Granted Patent B2

US 12,230,475 · App. 16/219,535 · Granted Feb 18, 2025

Inventors: Alok Ranjan (Austin, TX); Peter Ventzek (Austin, TX); Mitsunori Ohata (Miyagi, JP)

Assignee: Tokyo Electron Limited

H01J37/32146C23C16/45536H01J37/3211H01L21/3065H01L21/67069H01L21/6831H01J2237/332H01J2237/334

Abstract

Claims (49)

1. A plasma processing system comprising:

a vacuum chamber;

a first coupling electrode configured to provide power for generation of a plasma in the vacuum chamber by coupling source power (SP) pulses to the plasma;

a substrate holder disposed in the vacuum chamber, the substrate holder being configured to support a substrate;

a second coupling electrode configured to couple bias power (BP) pulses to the substrate;

a timing circuit configured to generate a delay causing a first nonzero offset duration separating trailing edges of the SP pulses and leading edges of the BP pulses and to generate a trigger signal immediately following the first nonzero offset duration;

an SP pulse modulation circuit coupled to an input of the timing circuit, the SP pulse modulation circuit configured to receive SP pulse parameters and output SP pulse signals corresponding to the SP pulses to the timing circuit, the delay being triggered by leading edges of the SP pulse signals or trailing edges of the SP pulse signals; and

a BP pulse modulation circuit coupled to an output of the timing circuit and configured to receive BP pulse parameters different from the SP pulse parameters and output BP pulse signals triggered by the trigger signal and corresponding to the BP pulses.

2. The plasma processing system of claim 1 , wherein the first coupling electrode is inductively coupled to the plasma, and wherein the plasma processing system comprises a inductively coupled plasma processing system.

3. The plasma processing system of claim 1 , further comprising an SP function generator configured to generate the SP pulses using the SP pulse signals,

wherein the timing circuit is configured to be triggered by the trailing edges of the SP pulse signals and generate the delay, and

wherein the SP pulse modulation circuit comprises a first output coupled to an input of the SP function generator and configured to supply the SP pulse signals to the SP function generator, and a second output coupled to the timing circuit and configured to supply the SP pulse signals to the timing circuit.

4. The plasma processing system of claim 3 , wherein the timing circuit is further configured to cause a second offset duration separating trailing edges of the BP pulses and leading edges of the SP pulses using the delay.

5. The plasma processing system of claim 3 , wherein the SP pulse parameters comprise an SP pulse frequency and an SP pulse width, and wherein the BP pulse parameters comprise a BP pulse frequency and a BP pulse width.

6. The plasma processing system of claim 3 , wherein the SP function generator is configured to generate the SP pulses by modulating the SP pulse signals received from the SP pulse modulation circuit with an alternating current (AC) signal generated at a first frequency.

7. The plasma processing system of claim 6 , further comprising:

a BP function generator coupled to the BP pulse modulation circuit and configured to generate the BP pulses by modulating the BP pulse signals with an AC signal generated at a second frequency, wherein the second frequency is less than about 15 MHz, and wherein the first frequency is greater than about 10 MHz.

8. An apparatus comprising:

a vacuum chamber;

a coupling electrode coupled to a source power (SP) supply node and configured to generate a plasma within the vacuum chamber using a first sequence of SP pulses;

a substrate holder coupled to a bias power (BP) supply node and disposed within the vacuum chamber, the substrate holder being configured to support a substrate to be processed by ions of the plasma accelerated towards the substrate by a second sequence of BP pulses;

a timing circuit configured to generate a delay causing a nonzero offset duration separating trailing edges of the first sequence and leading edges of the second sequence and to generate a trigger signal immediately following the nonzero offset duration, the delay being triggered by leading edges of the first sequence or the trailing edges of the first sequence;

an SP pulse modulation circuit coupled to an input of the timing circuit, the SP pulse modulation circuit configured to receive SP pulse parameters and output SP pulse signals corresponding to the SP pulses to the timing circuit; and

a BP pulse modulation circuit coupled to an output of the timing circuit and configured to receive BP pulse parameters different from the SP pulse parameters and to output BP pulse signals triggered by the trigger signal and corresponding to the BP pulses.

9. The apparatus of claim 8 , wherein the SP pulses and the BP pulses are at least partially non-overlapping in time.

10. The apparatus of claim 8 , wherein the coupling electrode is a resonant coupling electrode.

11. The apparatus of claim 10 , further comprising:

a function generator; and

a directional coupler comprising an output directly coupled to the resonant coupling electrode with no intervening impedance matching network, and an input directly coupled to the function generator with no intervening impedance matching network.

12. The apparatus of claim 10 , wherein the resonant coupling electrode is a helical resonator antenna.

13. A method of plasma processing comprising:

using a first pulse modulation circuit, outputting a first signal to both a first function generator and a timing circuit;

generating a first source power (SP) pulse using the first function generator in response to the first signal;

providing the first SP pulse at a first coupling electrode of a vacuum chamber to generate a plasma;

triggering a delay using the timing circuit in response to detecting a leading edge of the first signal or a trailing edge of the first signal, the leading edge of the first signal corresponding with a leading edge of the first SP pulse and the trailing edge of the first signal corresponding with a trailing edge of the first SP pulse, wherein the delay causes a first nonzero offset duration between the trailing edge of the first SP pulse and the leading edge of a subsequent bias power (BP) pulse during which no source power or bias power is provided to the vacuum chamber;

generating a trigger signal immediately following the first nonzero offset duration;

generating a BP pulse triggered by the trigger signal;

providing the BP pulse at a second coupling electrode of the vacuum chamber; and

performing a plasma deposition or etch process on a substrate disposed in the vacuum chamber, wherein providing the BP pulse accelerates ions from the plasma towards the substrate.

14. The method of claim 13 , wherein:

the first nonzero offset duration is between about 15 μs and about 20 μs.

15. The method of claim 13 , further comprising:

generating a second SP pulse using the first function generator, wherein a trailing edge of the BP pulse is separated from a leading edge of the second SP pulse by a second nonzero offset duration that is greater than zero seconds.

16. The method of claim 13 , further comprising:

generating a second SP pulse using the first function generator, wherein the leading edge of the first SP pulse is separated from a leading edge of the second SP pulse by a pulse modulation period that is between about 200 μs and about 1000 μs.

17. The plasma processing system of claim 1 , further comprising:

an SP function generator, wherein the first coupling electrode is a resonant coupling electrode; and

a directional coupler comprising an output directly coupled to the resonant coupling electrode with no intervening impedance matching network, and an input directly coupled to the SP function generator with no intervening impedance matching network.

18. The plasma processing system of claim 17 , wherein the resonant coupling electrode is a helical resonator antenna.

Assignments (1)

Continuity (3)

References Cited (85)