IP Library › Granted Patent US 12,349,412
Granted Patent B2
US 12,349,412 · App. 17/602,433 · Granted Jul 1, 2025

Semiconductor device and method for manufacturing semiconductor device

Inventors: Takanori Matsuzaki (Atsugi, JP); Kosei Nei (Yokohama, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H10D30/6755H10D30/6758
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Quick Facts
Patent No.
US 12,349,412
App. No.
17/602,433
Granted
Jul 1, 2025
Kind
B2
Abstract

A semiconductor device with less variation in transistor characteristics is provided. The semiconductor device includes a transistor, a first and a second conductor, and a first to a third insulator. The transistor and the first conductor are provided over the first insulator. The transistor includes an oxide semiconductor. The second insulator is provided over the transistor. The first conductor includes a region which does not overlap with the second insulator. The third insulator is provided to cover the first conductor, the transistor, and the second insulator. The second conductor is provided over the third insulator and at least partly overlaps with the first conductor.

Claims (49)

1. A semiconductor device, comprising:

a transistor, a first conductor, a second conductor, a first insulator, a second insulator, and a third insulator,

wherein the transistor and the first conductor are over the first insulator,

wherein the transistor comprises an oxide semiconductor,

wherein the second insulator is over the transistor,

wherein the first conductor comprises a region not overlapping with the second insulator,

wherein the third insulator covers the first conductor, the transistor, and the second insulator,

wherein the second conductor is over the third insulator and comprises a region overlapping with the first conductor,

wherein a first region of the third insulator is in direct contact with a top surface and a side surface of the first conductor,

wherein a second region of the third insulator is in direct contact with a top surface of the first insulator, and

wherein the second conductor comprises a region overlapping with the second region of the third insulator.

2. A semiconductor device, comprising:

a first oxide, a second oxide, a first conductor, a second conductor, a third conductor, a fourth conductor, a fifth conductor, a sixth conductor, a first insulator, a second insulator, a third insulator, a fourth insulator, and a fifth insulator,

wherein the first conductor is over the first insulator,

wherein the second insulator is over the first conductor,

wherein the first oxide is over the second insulator,

wherein the second conductor and the third conductor are over the first oxide,

wherein the third insulator is over the second conductor and the third conductor,

wherein the second oxide is between the second conductor and the third conductor over the first oxide,

wherein the fourth insulator is over the second oxide,

wherein the fourth conductor is over the fourth insulator,

wherein the fifth conductor is over the first insulator and comprises a region not overlapping with the third insulator,

wherein the fifth insulator covers the second insulator, the third insulator, and the fifth conductor,

wherein the sixth conductor is over the fifth insulator and comprises a region overlapping with the fifth conductor,

wherein a first region of the fifth insulator is in direct contact with a top surface and a side surface of the fifth conductor,

wherein a second region of the fifth insulator is in direct contact with a top surface of the first insulator, and

wherein the sixth conductor comprises a region overlapping with the second region of the fifth insulator.

3. The semiconductor device, according to claim 2 ,

wherein a top surface of the sixth conductor is level with or substantially level with a top surface of the fifth insulator in a region overlapping with the second insulator.

4. The semiconductor device, according to claim 2 ,

wherein the fifth insulator is in contact with a side surface of the third insulator and a side surface of the second insulator.

5. The semiconductor device, according to claim 2 ,

wherein each of the first insulator and the fifth insulator comprises a nitride containing silicon.

6. The semiconductor device, according to claim 2 ,

wherein the fifth insulator has a stacked-layer structure.

7. The semiconductor device, according to claim 2 ,

wherein a top surface of the third insulator, a top surface of the second oxide, a top surface of the fourth insulator, and a top surface of the fourth conductor are level with or substantially level with each other.

8. The semiconductor device, according to claim 2 ,

wherein the fifth conductor comprises a region overlapping with the third insulator.

9. The semiconductor device, according to claim 2 ,

wherein the first conductor and the fifth conductor are integrated in an island-like shape.

10. The semiconductor device, according to claim 2 ,

wherein the fifth conductor does not overlap with the third insulator, and

wherein the fifth insulator is in contact with one side surface of the fifth conductor and a side surface opposite to the one side surface.

11. The semiconductor device, according to claim 2 ,

wherein the third conductor is electrically connected to the sixth conductor.

12. The semiconductor device, according to claim 2 ,

wherein an opening reaching the fifth conductor is formed in the second insulator and the first oxide, and

wherein the third conductor is in contact with the fifth conductor through the opening.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2021
From: MATSUZAKI, TAKANORI; NEI, KOSEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 057740/0614 →
Priority Claims (1)
JP 2019-087007 · Apr 29, 2019 · national
Continuity (1)
Related Publication 20220173249A1 · Jun 2, 2022
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