Polishing pad and method for manufacturing semiconductor device using same
Provided is a polishing composition for a semiconductor process comprising abrasive particles, the abrasive particles containing an amine-based polishing rate improver, and comprising the amine-based polishing rate improver. Provided is a polishing composition for a semiconductor process further comprising an amine-based surface modifier around the surface of the abrasive particles, wherein the sum of the content of an amine group contained in the amine-based polishing rate improver and the content of an amine group contained in the amine-based surface modifier is 0.0185% by weight or more based on the total composition weight. The polishing composition for a semiconductor process may implement the polishing rate and defect prevention performance within a target range in polishing the boron-doped polysilicon layer.
1 . A polishing composition for a semiconductor process, the polishing composition comprising:
water;
abrasive particles having an amine-based surface modifier bonded to the surface thereof;
an amine-based polishing rate improver; and
a silicon nitride inhibitor,
wherein the silicon nitride inhibitor is selected from the group consisting of polyacrylic acid, polymaleic acid, polymethacrylic acid, polyacrylamide-co-acrylic acid, polyacrylic acid-co-maleic acid, polyacrylamide-co-acrylic acid, and mixtures thereof,
wherein the polishing composition contains 0.0185% by weight or more of an amine group based on the total weight of the polishing composition,
wherein the polishing composition has a zeta potential of 15 mV to 33 mV,
wherein the polishing composition has a polishing strength index (PSI) represented by the following Equation 1 of 0.6 to 5:
PSI
=
ZP
20
mV
×
A
C
1
0.01
wt
%
×
A
C
2
0.01
wt
%
[
Equation
1
]
wherein,
ZP is a zeta potential of the polishing composition,
AC1 is an amount of the amine group contained in the amine-based surface modifier in weight percent based on the total composition weight, and
AC2 is an amount of the amine group contained in the amine-based polishing rate improver in weight percent based on the total composition weight.
2 . The polishing composition of claim 1 , wherein the amine-based surface modifier is an amino silane.
3 . The polishing composition of claim 2 , wherein the amino silane is selected from the group consisting of 3-aminopropyltriethoxysilane, bis[(3-triethoxysilyl)propyl]amine, 3-aminopropyltrimethoxysilane, bis[(3-trimethoxysilyl)propyl]amine, 3-aminopropylmethyldiethoxysilane, 3-aminopropylmethyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, N-bis [3-(trimethoxysilyl)propyl]-1,2-ethylenediamine, N-[3-(triethoxysilyl)propyl]ethylenediamine, diethylenetriaminopropyltrimethoxysilane, diethylenetriaminopropylmethyldimethoxysilane, diethylaminomethyltriethoxysilane, diethylaminopropyltrimethoxysilane, diethylaminopropyltriethoxysilane, dimethylaminopropyltrimethoxysilane, N-[3-(trimethoxysilyl)propyl]butylamine, and combinations thereof.
4 . The polishing composition of claim 1 , wherein the amine-based surface modifier is contained in an amount of 0.01% by weight to 0.5% by weight based on the total weight of the polishing composition for a semiconductor process.
5 . The polishing composition of claim 1 , wherein the polishing composition has a pH of 4 or less.
6 . The polishing composition of claim 1 , further comprising a surfactant.
7 . The polishing composition of claim 1 , wherein the silicon nitride inhibitor is contained in an amount of 0.05 to 0.13% by weight based on the total weight of the polishing composition for a semiconductor process.
8 . The polishing composition of claim 6 , wherein the surfactant is contained in an amount of 0.0015 to 0.005% by weight based on the total weight of the polishing composition for a semiconductor process.
9 . The polishing composition of claim 1 , wherein the abrasive particles have an average particle diameter of 30 nm to 50 nm and a viscosity of 1.20 cps to 1.40 cps.
10 . The polishing composition of claim 1 , wherein the polishing composition is used in a polishing process of a semiconductor substrate including a boron-doped polysilicon layer.
11 . The polishing composition of claim 1 , wherein the amine-based polishing rate improver is selected from the group consisting of glycine, β-alanine betaine, stearyl betaine, and mixtures thereof.
12 . The polishing composition of claim 1 , wherein the amine-based polishing rate improver is contained in an amount of 0.03 to 0.095% by weight based on the total weight of the polishing composition for a semiconductor process.
13 . The polishing composition of claim 1 , further comprising a pH adjuster.