Granted Patent B2

US 12,271,595 · App. 17/903,455 · Granted Apr 8, 2025

Inventors: David Lazovsky (Los Gatos, CA); Philip Winterbottom (San Jose, CA); Martinus Bos (San Jose, CA)

Assignee: Celestial AI Inc.

G06F3/0611G02B6/12019G02B6/1225G02B6/4246G06F3/0655G06F3/0679H04Q11/0062

Abstract

Claims (34)

1. An apparatus coupled to a memory, comprising:

an interface associated with the memory, the interface having a first transmit unit for sending data from the memory and a first receive unit for receiving data sent to the memory; and

a fabric connected to the first transmit unit and the first receive unit, the fabric including a plurality of routers, each of the plurality of routers having additional transmit units and additional receive units, the plurality of routers arranged in a grid formed by connecting the additional transmit units with the additional receive units via optical links,

wherein a first portion of the plurality of routers creates a first connection between the first transmit unit and the first receive unit and a local electrical router associated with a first one of the plurality of routers, and wherein the first portion of the plurality of routers are connected to a first portion of the memory,

wherein the interface includes a second transmit unit and a second receive unit connected to the fabric, and

wherein a second portion of the plurality of routers creates a second connection between the second transmit unit and the second receive unit and the local electrical router, and wherein the second portion of the plurality of routers are connected to a second portion of the memory.

2. The apparatus of claim 1 , wherein the first transmit unit and the additional transmit units include a driver coupled to an optical modulator.

3. The apparatus of claim 1 , wherein the first receive unit and the additional receive units include a photodetector coupled to an amplifier.

4. The apparatus of claim 1 , further comprising a routing module for transporting a first data item in the first portion of the memory to the local electrical router.

5. The apparatus of claim 4 , wherein the routing module transports a second data item in the second portion of the memory to the local electrical router.

6. The apparatus of claim 2 , wherein the driver is coupled to the optical modulator with a copper pillar or a C4 bump.

7. The apparatus of claim 3 , wherein the photodetector is coupled to the amplifier with a copper pillar or a C4 bump.

8. The apparatus of claim 2 , wherein the driver resides in an electronic-integrated circuit (EIC) or a photonic-integrated circuit (PIC) and the optical modulator and optical links reside in the PIC.

9. The apparatus of claim 3 , wherein the amplifier resides in an electronic-integrated circuit (EIC) or a photonic-integrated circuit (PIC) and the photodetector resides in the PIC.

10. The apparatus of claim 1 , wherein the interface further includes a memory controller, wherein when a request includes memory access information, the memory controller uses the memory access information to obtain a data item from the memory.

11. The apparatus of claim 1 , wherein the memory is selected from the group consisting of a NAND Flash memory, a solid-state drive (SSD) memory, a NOR Flash memory, a CMOS memory, a thin film transistor-based memory, a phase change memory (PCM), a storage class memory (SCM), a magneto-resistive memory (MRAM), a resistive RAM, a DRAM, an HBM, a DDR-based DRAM, and a DIMM memory.

12. The apparatus of claim 2 , wherein the optical modulator is selected from the group consisting of an electro-absorption modulator (EAM), a micro-ring resonator, a ring modulator, a Mach-Zender interferometer (MZI), and a quantum confined stark effect (QCSE) electro-absorptive modulator.

13. A system that is operably coupled to a memory subsystem comprising:

an interface system associated with the memory subsystem, the interface system having a first transmit unit for sending data from the memory subsystem and a first receive unit for receiving data sent to the memory subsystem; and

a fabric connected to the first transmit unit and the first receive unit, the fabric system including a plurality of routers, each of the plurality of routers having additional transmit units and additional receive units, the plurality of routers arranged in a grid formed by connecting the additional transmit units with the additional receive units via optical links,

wherein a first portion of the plurality of routers creates a first connection between the first transmit unit and the first receive unit and a local electrical router associated with a first one of the plurality of routers, and wherein the first portion of the plurality of routers are connected to a first portion of the memory,

wherein the interface system includes a second transmit unit and a second receive unit connected to the fabric, and

wherein a second portion of the plurality of routes creates a second connection between the second transmit unit and the second receive unit and the local electrical router, and wherein the second portion of the plurality of routers are connected to a second portion of the memory.

14. The system of claim 13 , wherein the first transmit units and the additional transmit units include a driver coupled to an optical modulator.

15. The system of claim 13 , wherein the first receive units and the additional receive units include a photodetector coupled to an amplifier.

16. The system of claim 13 , further comprising a routing system for transporting a first data item in the first portion of the memory subsystem to the local electrical router.

17. The system of claim 16 , wherein the routing system transports a second data item in the second portion of the memory subsystem to the local electrical router.

18. The system of claim 14 , wherein the driver is coupled to the optical modulator with a copper pillar or a C4 bump.

19. The system of claim 15 , wherein the photodetector is coupled to the amplifier with a copper pillar or a C4 bump.

20. The system of claim 14 , wherein the driver resides in an electronic-integrated circuit (EIC) or a photonic-integrated circuit (PIC) and the optical modulator and the optical links reside in the PIC.

21. The system of claim 15 , wherein the amplifier resides in an electronic-integrated circuit (EIC) or a photonic-integrated circuit (PIC) and the photodetector resides in the PIC.

22. The system of claim 13 , wherein the interface system further includes a memory controller, wherein when a request includes memory access information, the memory controller system uses the memory access information to obtain a data item from the memory subsystem.

23. The system of claim 13 , wherein the memory subsystem is selected from the group consisting of a NAND Flash memory, a solid-state drive (SSD) memory, a NOR Flash memory, a CMOS memory, a thin film transistor-based memory, a phase change memory (PCM), a storage class memory (SCM), a magneto-resistive memory (MRAM), a resistive RAM, a DRAM, an HBM, a DDR-based DRAM, and a DIMM memory.

24. The system of claim 14 , wherein the optical modulator is selected from the group consisting of an electro-absorption modulator (EAM), a micro-ring resonator, a ring modulator, a Mach-Zender interferometer (MZI), and a quantum confined stark effect (QCSE) electro-absorptive modulator.

Assignments (2)

Continuity (2)

References Cited (323)

Cited By (1)

US 12,663,580