IP Library Granted Patent US 12,328,083
Granted Patent B2
US 12,328,083 · App. 18/150,927 · Granted Jun 10, 2025

Systems and methods for galvanic isolation for inverter for electric vehicle

Inventors: Srikanth Vijaykumar (Carmel, IN); Seyed R. Zarabadi (Kokomo, IN)
Assignee: BorgWarner US Technologies LLC
H02P27/06B60L3/003B60L15/007B60L15/08B60L50/40B60L50/51B60L50/60B60L50/64B60L53/20B60L53/22B60L53/62B60R16/02G01R15/20G06F1/08G06F13/4004H01L21/4882H01L23/15H01L23/3672H01L23/3675H01L23/3735H01L23/4006H01L23/467H01L23/473H01L23/49562H01L23/5383H01L24/32H01L24/33H01L25/072H01L25/50H02J7/0063H02M1/0009H02M1/0054H02M1/08H02M1/084H02M1/088H02M1/123H02M1/32H02M1/322H02M1/327H02M1/4258H02M1/44H02M3/33523H02M7/003H02M7/537H02M7/5387H02M7/53871H02M7/53875H02M7/5395H02P27/08H02P27/085H02P29/024H02P29/027H02P29/68H05K1/145H05K1/181H05K1/182H05K5/0247H05K7/20154H05K7/2039H05K7/2049H05K7/20854H05K7/209H05K7/20927H10D64/018B60L15/20B60L2210/30B60L2210/40B60L2210/42B60L2210/44B60L2240/36G06F2213/40H01L2023/405H01L2023/4087H01L2224/32225H01L2224/32245H01L2224/33181H02J2207/20H02P2207/05H03K19/20H05K2201/042H05K2201/10166
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Quick Facts
Patent No.
US 12,328,083
App. No.
18/150,927
Filed
Jan 6, 2023
Granted
Jun 10, 2025
Kind
B2
Examiner
DUDA, RINA I
Art Unit
2846
USPC
318/139
Abstract

A system includes an inverter including: a first galvanic isolator separating a low voltage area from a high voltage area, the first galvanic isolator having a first galvanic isolator output path; a second galvanic isolator having a second galvanic isolator output path; an amplifier connected to the first galvanic isolator via the first galvanic isolator output path, and connected to the second galvanic isolator via the second galvanic isolator output path, the amplifier having a first amplifier output path and a second amplifier output path; a comparator connected to the amplifier via the first amplifier output path and the second amplifier output path, the comparator having a first comparator output path and a second comparator output path; and a pulse reshape and envelope detector connected to the comparator via the first comparator output path and the second comparator output path.

Claims (56)

1. A system comprising:

an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes:

a first galvanic isolator separating a low voltage area from a high voltage area, the first galvanic isolator having a first galvanic isolator output path;

a second galvanic isolator separating the low voltage area from the high voltage area, the second galvanic isolator having a second galvanic isolator output path;

an amplifier in the high voltage area, connected to the first galvanic isolator via the first galvanic isolator output path, and connected to the second galvanic isolator via the second galvanic isolator output path, the amplifier having a first amplifier output path and a second amplifier output path;

a comparator in the high voltage area, and connected to the amplifier via the first amplifier output path and the second amplifier output path, the comparator having a first comparator output path and a second comparator output path; and

a pulse reshape and envelope detector in the high voltage area, and connected to the comparator via the first comparator output path and the second comparator output path.

2. The system of claim 1 , further comprising:

a pulse transceiver in the low voltage area, the pulse transceiver connected to the first galvanic isolator via a first pulse transceiver output path and connected to the second galvanic isolator via a second pulse transceiver output path.

3. The system of claim 2 , wherein the pulse transceiver, the amplifier, the comparator, and the pulse reshape and envelope detector are configured to operate together to transmit a Pulse Width Modulation signal from the low voltage area to the high voltage area.

4. The system of claim 2 , wherein the pulse transceiver is configured to output a first pulse on the first pulse transceiver output path and a second pulse on the second pulse transceiver output path.

5. The system of claim 4 , wherein the pulse transceiver is further configured to receive a primary pulse, and output the first pulse and the second pulse, based on the received primary pulse.

6. The system of claim 4 , wherein:

the first galvanic isolator is configured to receive the first pulse on the first pulse transceiver output path, and send a first galvanic isolator pulse on the first galvanic isolator output path based on the received first pulse, and

the second galvanic isolator is configured to receive the second pulse on the second pulse transceiver output path, and send a second galvanic isolator pulse on the second galvanic isolator output path based on the received second pulse.

7. The system of claim 6 , wherein the amplifier is configured to:

receive the first galvanic isolator pulse on the first galvanic isolator output path, amplify the first galvanic isolator pulse based on one or more properties of the amplifier, and send a first amplified pulse on the first amplifier output path based on the amplified first galvanic isolator pulse, and

receive the second galvanic isolator pulse on the second galvanic isolator output path, amplify the second galvanic isolator pulse based on one or more properties of the amplifier, and send a second amplified pulse on the second amplifier output path based on the amplified second galvanic isolator pulse.

8. The system of claim 7 , wherein the comparator is configured to:

receive the first amplified pulse on the first amplifier output path, receive the second amplified pulse on the second amplifier output path, perform a comparison of the first amplified pulse with the second amplified pulse, output a first compared pulse on the first comparator output path based on the comparison, and output a second compared pulse on the second comparator output path based on the comparison.

9. The system of claim 8 , wherein the pulse reshape and envelope detector is configured to:

receive the first compared pulse on the first comparator output path, receive the second compared pulse on the second comparator output path, and output an output pulse based on the first compared pulse and the second compared pulse.

10. The system of claim 1 , wherein the amplifier includes:

a trimmer, and

a tunable filter.

11. The system of claim 1 , further comprising:

an out-of-range detector connected to the first galvanic isolator, the second galvanic isolator, and the pulse reshape and envelope detector.

12. The system of claim 1 , wherein the comparator further comprises a resistor averaging circuit.

13. The system of claim 1 , further comprising:

the battery configured to supply the DC power to the inverter; and

the motor configured to receive the AC power from the inverter to drive the motor.

14. A method comprising:

receiving, by one or more controllers, a first pulse, and transmitting, by the one or more controllers, a first galvanic isolator pulse based on the first pulse;

receiving, by the one or more controllers, a second pulse, and transmitting by the one or more controllers, a second galvanic isolator pulse based on the second pulse;

receiving, by the one or more controllers, the first galvanic isolator pulse and the second galvanic isolator pulse;

generating, by the one or more controllers, a first amplified pulse based on the first galvanic isolator pulse and a second amplified pulse based on the second galvanic isolator pulse;

receiving, by the one or more controllers, the first amplified pulse and the second amplified pulse;

comparing, by the one or more controllers, the first amplified pulse and the second amplified pulse;

determining, by the one or more controllers, a mitigation action based on the comparing; and

generating, by the one or more controllers, an output pulse based on the mitigation action.

15. The method of claim 14 , wherein the determining the mitigation action comprises:

determining, by the one or more controllers, a difference between one or more signal properties of the first amplified pulse and one or more signal properties of the second amplified pulse;

comparing, by the one or more controllers, the difference to a difference threshold; and

determining, by the one or more controllers, the mitigation action based on the comparing the difference to the difference threshold.

16. The method of claim 14 , wherein the generating the output pulse comprises maintaining a previous signal state based on one or more of a previous first galvanic isolator pulse or a previous second galvanic isolator pulse.

17. The method of claim 14 , further comprising:

trimming, by the one or more controllers, one or more of the first galvanic isolator pulse or the second galvanic isolator pulse.

18. The method of claim 14 , further comprising:

determining, by the one or more controllers, one of an in-range indication or an out-of-range indication based on the first galvanic isolator pulse and the second galvanic isolator pulse.

19. The method of claim 18 , wherein the generating the output pulse comprises generating the output pulse based on the one of the in-range indication or the out-of-range indication.

20. A system comprising:

a first galvanic isolator configured to receive a first pulse from a pulse transceiver and output a first galvanic isolator pulse based on the received first pulse;

a second galvanic isolator configured to receive a second pulse from the pulse transceiver and generate a second galvanic isolator pulse based on the received second pulse;

an amplifier configured to receive the first galvanic isolator pulse and the second galvanic isolator pulse, amplify the first galvanic isolator pulse and the second galvanic isolator pulse as a first amplified pulse and a second amplified pulse, respectively, and output the first amplified pulse and the second amplified pulse;

a comparator configured to receive the first amplified pulse and the second amplified pulse, perform a comparison of the first amplified pulse to the second amplified pulse, and generate a first compared pulse and a second compared pulse, respectively, based on the comparison; and

a pulse reshape and envelope detector configured to receive the first compared pulse and the second compared pulse, and generate an output pulse based on the first compared pulse and the second compared pulse.

Assignments (2)
CHANGE OF NAME Recorded Sep 18, 2024
From: DELPHI TECHNOLOGIES IP LIMITED
To: BORGWARNER US TECHNOLOGIES LLC
Reel/Frame 068987/0367 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2023
From: VIJAYKUMAR, SRIKANTH; ZARABADI, SEYED R.
To: DELPHI TECHNOLOGIES IP LIMITED
Reel/Frame 062439/0972 →
Continuity (5)
Provisional Application 63377486 · Sep 28, 2022
Provisional Application 63377501 · Sep 28, 2022
Provisional Application 63377512 · Sep 28, 2022
Provisional Application 63378601 · Oct 6, 2022
Related Publication 20240103045A1 · Mar 28, 2024
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“New products,” 5 Pages, Retrieved from internet URL:https://www.ti.com/product-category/new-products.html?%20releasePeriod=364#releasePeriod=90. [cited by applicant]
“Qualcomm and Bosch Showcase New Central Vehicle Computer for Digital Cockpit and Driver Assistance Functions at CES 2024,” 2024, 8 Pages. Retrieved from internet URL:https://www.qualcomm.com/news/releases/2024/01/qualc… [cited by applicant]
Balogh, L., “Fundamentals of MOSFET and IGBT Gate Driver Circuits,” Texas Instruments Application Report, SLUA618-March (2017), Retrieved from internet URL: https://ghioni.faculty.polimi.it/pel/readmat/gate-drive.pdf, 6… [cited by applicant]
Baranwal, S., “Common-mode transient immunity for isolated gate drivers,” Analog Applications Journal, Texas Instruments (2015), Retrieved from internet URL: https://www.ti.com/lit/an/slyt648/slyt648.pdf?ts=170205233606… [cited by applicant]
Boomer, K. and Ahmad H., “Performance Evaluation of an Automotive-Grade, High-Speed Gate Driver for SiC FETs, Type UCC27531, Over a Wide Temperature Range,” NASA Electronic Parts and Packaging Program No. GRC-E-DAA-TN25… [cited by applicant]
Ke, X, et al., “A 3-to-40V 10-to-30MHz Automotive-Use GaN Driver with Active BST Balancing and VSW Dual-Edge Dead-Time Modulation Achieving 8.3% Efficiency Improvement and 3.4ns Constant Propagation Delay,” 2016 IEEE In… [cited by applicant]
Sridhar, N., “Impact of an Isolated Gate Driver,” Texas Instruments: Dallas, Texas (2019), Retrieved from Internet URL: https://www.ti.com/lit/wp/slyy140a/slyy140a.pdf, 08 pages. [cited by applicant]
Sridhar, N., “Power Electronics in Motor Drives: Where is it?” Texas Instruments (2015), Retrieved from Internet URL: https://www.ti.com/lit/wp/slyy078a/slyy078a.pdf, 09 pages. [cited by applicant]
Sridhar, N., “Silicon Carbide Gate Drivers—a Disruptive Technology in Power Electronics,” Texas Instruments, Dallas, Texas (2019), Retrieved from Internet URL: https://www.ti.com/lit/wp/slyy139/slyy139.pdf, 07 pages. [cited by applicant]