Granted Patent B2

US 12,648,202 · App. 18/334,284 · Granted Jun 2, 2026

Inventors: Yusuke Miyata (Tokyo, JP); Kenji Suzuki (Tokyo, JP); Yuki Haraguchi (Tokyo, JP); Haruhiko Minamitake (Tokyo, JP); Taiki Hoshi (Tokyo, JP); Hidenori Koketsu (Tokyo, JP)

Assignee: Mitsubishi Electric Corporation

H10D62/60H02M7/53875H10D12/038H10D12/481H10D62/127

Abstract

Claims (48)

1 . A semiconductor device comprising:

a drift layer of a first conductivity type provided between a first main surface and a second main surface of a semiconductor substrate having the first main surface and the second main surface opposite to the first main surface; and

a field stop layer of the first conductivity type having an impurity concentration higher than that of the drift layer and provided between the drift layer and the second main surface,

wherein a net carrier concentration profile at room temperature of the field stop layer have at least one peak from the second main surface toward the first main surface,

wherein a hydrogen atom concentration profile of the field stop layer have at least two peaks from the second main surface toward the first main surface, and

wherein the hydrogen atom concentration profile has more peaks than the net carrier concentration profile.

2 . The semiconductor device according to claim 1 ,

wherein the field stop layer have:

a first field stop layer whose hydrogen atom concentration profile have a first hydrogen atom concentration peak; and

a second field stop layer having a second hydrogen atom concentration peak smaller than the first hydrogen atom concentration peak.

3 . The semiconductor device according to claim 2 ,

wherein the second field stop layer is provided closer to the second main surface than the first field stop layer is, and

wherein the net carrier concentration profile does not have a peak in the same position as the second hydrogen atom concentration peak.

4 . The semiconductor device according to claim 2 ,

wherein a half width of the second hydrogen atom concentration peak is larger than a half width of the first hydrogen atom concentration peak.

5 . The semiconductor device according to claim 2 ,

wherein the second hydrogen atom concentration peak can be approximated by a non-gaussian distribution.

6 . The semiconductor device according to claim 2 ,

wherein the second hydrogen atom concentration peak is equal to or less than 1/100 times the first hydrogen atom concentration peak.

7 . The semiconductor device according to claim 1 ,

further comprising a buffer layer of the first conductivity type containing phosphorus or arsenic impurities and provided between the field stop layer and the second main surface.

8 . The semiconductor device according to claim 1 ,

wherein an oxygen atom content of the semiconductor substrate is equal to or more than 1×10 17 cm −3 .

9 . The semiconductor device according to claim 1 ,

wherein the semiconductor substrate is an MCZ wafer.

10 . A power conversion device, comprising:

a main conversion circuit that has the semiconductor device according to claim 1 , and which converts input electric power and outputs the converted electric power;

a drive circuit that outputs, to the semiconductor device, a drive signal for driving the semiconductor device; and

a control circuit that outputs, to the drive circuit, a control signal for controlling the drive circuit.

11 . A method of manufacturing a semiconductor device, comprising:

preparing a semiconductor substrate having a drift layer of a first conductivity type between a first main surface and a second main surface opposite to the first main surface;

implanting first conductivity type impurities into the semiconductor substrate in a depth direction from the second main surface toward the first main surface; and

performing a heat treatment in which the first conductivity type impurities are diffused and in which a field stop layer having an impurity concentration higher than that of the drift layer and provided between the drift layer and the second main surface is formed,

wherein a net carrier concentration profile at room temperature of the field stop layer formed in the heat treatment have at least one peak from the second main surface toward the first main surface,

wherein a hydrogen atom concentration profile of the field stop layer formed in the heat treatment have at least two peaks from the second main surface toward the first main surface, and

wherein the hydrogen atom concentration profile has more peaks than the net carrier concentration profile.

12 . The method of manufacturing the semiconductor device according to claim 11 ,

wherein the implanting includes a first implanting in which first impurities being first conductivity type impurities are implanted and a second implanting in which second impurities being first conductivity type impurities are implanted,

wherein in the first implanting, acceleration energy is equal to or more than 800 keV and less than 2000 keV and implantation amount of the first impurities is equal to or more than 1×10 13 cm −2 and equal to or less than 1×10 15 cm −2 , and

wherein in the second implanting, acceleration energy is equal to or more than 200 keV and equal to or less than 800 keV and implantation amount of the second impurities is equal to or more than 1×10 11 cm −2 and less than 5×10 12 cm −2 .

13 . The method of manufacturing the semiconductor device according to claim 12 ,

wherein the first implanting is performed after the second implanting.

14 . The method of manufacturing the semiconductor device according to claim 12 ,

wherein the first impurities are protons.

15 . The method of manufacturing the semiconductor device according to claim 12 ,

wherein the second impurities are compounds of phosphorus and hydrogen.

16 . The method of manufacturing the semiconductor device according to claim 11 ,

wherein heat treatment temperature in the heat treatment is equal to or more than 350° C. and equal to or less than 500° C.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (13)