Method and structure for diodes with backside contacts
A semiconductor structure includes a first semiconductor layer having an upper portion over a lower portion, a source/drain feature over the upper portion of the first semiconductor layer, a first contact structure under the lower portion of the first semiconductor layer and electrically connected to the lower portion of the first semiconductor layer. The lower portion is more heavily doped with first dopants than the upper portion. The first dopants are of a first conductivity-type. The source/drain feature includes second dopants of a second conductivity-type opposite to the first conductivity-type.
1 . A semiconductor structure, comprising:
a first semiconductor layer having an upper portion over a lower portion, wherein the lower portion is more heavily doped with first dopants than the upper portion, the first dopants being of a first conductivity-type;
a source/drain feature over the upper portion of the first semiconductor layer, wherein the source/drain feature includes second dopants of a second conductivity-type opposite to the first conductivity-type;
a second semiconductor layer spaced apart from the upper portion of the first semiconductor layer and abutting the source/drain feature;
a metal gate structure wrapping around the second semiconductor layer;
a first contact structure under the lower portion of the first semiconductor layer and electrically connected to the lower portion of the first semiconductor layer; and
a first silicide feature between the lower portion of the first semiconductor layer and the first contact structure.
2 . The semiconductor structure of claim 1 , further comprising:
a metal layer under the first contact structure and electrically connected to the first contact structure.
3 . The semiconductor structure of claim 1 , further comprising:
a second contact structure over the source/drain feature and electrically connected to the source/drain feature.
4 . The semiconductor structure of claim 3 , further comprising:
a second silicide feature between the source/drain feature and the second contact structure.
5 . The semiconductor structure of claim 1 , further comprising:
a gate contact over the metal gate structure, wherein the gate contact is electrically connected to the metal gate structure and electrically connected to the source/drain feature.
6 . The semiconductor structure of claim 1 , wherein the upper portion of the first semiconductor layer is substantially free of the first dopants.
7 . The semiconductor structure of claim 1 , wherein the lower portion of the first semiconductor layer includes the first dopants at a dopant concentration in a range of 1E 19 atoms/cm 3 to 1E 20 atoms/cm 3 .
8 . The semiconductor structure of claim 1 , wherein the second semiconductor layer extends lengthwise in a horizontal direction above the upper portion of the first semiconductor layer.
9 . The semiconductor structure of claim 1 , further comprising:
a third semiconductor layer stacked above the second semiconductor layer, wherein the metal gate structure wraps around the third semiconductor layer.
10 . The semiconductor structure of claim 1 , further comprising:
inner spacers disposed between the metal gate structure and the source/drain feature.
11 . A semiconductor structure, comprising:
a well;
a plurality of semiconductor layers suspended above the well;
a metal gate structure wrapping around each of the semiconductor layers;
an epitaxial feature abutting the semiconductor layers;
a doped layer under the well, wherein the doped layer and the epitaxial feature include net dopants of opposite conductivity-types;
a first contact structure under the doped layer and electrically connected to the doped layer; and
a second contact structure over the epitaxial feature and electrically connected to the epitaxial feature.
12 . The semiconductor structure of claim 11 , wherein the well is substantially free of dopants.
13 . The semiconductor structure of claim 11 , wherein the well is lightly doped and the doped layer is heavily doped with a same dopant.
14 . The semiconductor structure of claim 11 , further comprising:
a third contact structure over the metal gate structure, wherein the third contact structure is electrically connected to the metal gate structure and electrically connected to the second contact structure.
15 . The semiconductor structure of claim 11 , wherein the doped layer has a thickness from about 10 nm to about 30 nm.
16 . The semiconductor structure of claim 11 , further comprising:
a frontside metal layer over the second contact structure and electrically connected to the second contact structure; and
a backside metal layer under the first contact structure and electrically connected to the first contact structure.
17 . A diode device, comprising:
a first semiconductor layer having an upper portion over a lower portion, wherein the lower portion is more heavily doped with first dopants than the upper portion, the first dopants being of a first conductivity-type;
a second semiconductor layer over the upper portion of the first semiconductor layer, wherein the second semiconductor layer includes second dopants of a second conductivity-type opposite to the first conductivity-type;
a third semiconductor layer abutting the second semiconductor layer;
a metal-containing feature wrapping around the third semiconductor layer;
a first contact structure under the lower portion of the first semiconductor layer and electrically connected to the lower portion of the first semiconductor layer; and
a second contact structure over the second semiconductor layer and electrically connected to the second semiconductor layer.
18 . The diode device of claim 17 , wherein the lower portion of the first semiconductor layer includes the first dopants at a dopant concentration in a range of 1E 19 atoms/cm 3 to 1E 20 atoms/cm 3 .
19 . The diode device of claim 17 , wherein the upper portion of the first semiconductor layer is substantially free of the first dopants.
20 . The diode device of claim 17 , wherein a lower portion of the second semiconductor layer is embedded in the upper portion of the first semiconductor layer.