Granted Patent B2

US 12,417,022 · App. 18/520,153 · Granted Sep 16, 2025

Inventors: Jani Hyvonen (Tampere, FI); Kimmo J. Mylly (Ylojarvi, FI); Jussi Hakkinen (Tampere, FI); Yevgen Gyl (Tampere, FI)

Assignee: Memory Technologies LLC

G06F3/061G06F3/0659G06F3/0673G06F12/0646G06F12/1458G06F13/1694G06F13/28G11C7/20G06F12/1433G06F12/1441G06F21/79G06F2212/1052Y02D10/00

Abstract

Claims (43)

1. A memory device comprising:

a memory configured to be accessed according to a plurality of predefined access types, the plurality of predefined access types including at least a default access type; and

a controller configured to:

configure access to the memory device according to the default access type such that at least a portion of the memory is configured according to the default access type for at least one usage;

receive, from a host device, a first command to configure access to the memory device in accordance with a second access type of the plurality of predefined access types such that the at least the portion of the memory is configured according to the second access type;

configure, based at least in part on the first command, access to the at least the portion of the memory according to the second access type; and

receive, after the first command, at least one second command to write data to the at least the portion of the memory according to the second access type.

2. The memory device of claim 1 , wherein the controller is further configured to:

configure access to the default access type during at least one of boot-up of the host device or power-up of the memory device.

3. The memory device of claim 1 , wherein the default access type corresponds to a most likely access need of the memory device.

4. The memory device of claim 1 , wherein the default access type is optimized for at least one of: data throughput, data lifetime, or power consumption associated with storing data.

5. The memory device of claim 1 , wherein the default access type is preselected.

6. The memory device of claim 1 , wherein the default access type includes at least one of: a sequential read, a sequential write, a random read, or a random write.

7. The memory device of claim 1 , wherein the controller is further configured to:

activate, based at least in part on the first command, the second access type.

8. The memory device of claim 1 , wherein the at least the portion of the memory includes one or more blocks and the default access type is optimized for data lifetime.

9. The memory device of claim 1 , further comprising:

a register that includes the default access type.

10. The memory device of claim 1 , wherein the controller is further configured to:

receive, from a host device, a third command to configure access to the memory device in accordance with a third access type of the plurality of predefined access types such that the at least the portion of the memory is configured according to the third access type; and

configure, based at least in part on the third command, access to the at least the portion of the memory according to the third access type.

11. A method comprising:

configuring, by a controller of a memory device with a memory, access to the memory device according to a default access type such that at least a portion of the memory is configured according to the default access type for at least one usage, wherein the default access type is one of a plurality of predefined access types;

receiving, from a host device and by the controller, a first command to configure access to the memory device in accordance with a second access type of the plurality of predefined access types such that the at least the portion of the memory is configured according to the second access type;

configuring, by the controller and based at least in part on the first command, access to the at least the portion of the memory according to the second access type; and

receiving, by the controller and after the first command, at least one second command to write data to the at least the portion of the memory according to the second access type.

12. The method of claim 11 , further comprising:

configuring, by the controller, access to the default access type during at least on of boot-up of the host device or power-up of the memory device.

13. The method of claim 11 , wherein the default access type corresponds to a most likely access need of the memory device.

14. The method of claim 11 , wherein the default access type is optimized for at least one of: data throughput, data lifetime, or power consumption associated with storing data.

15. The method of claim 11 , further comprising:

activating, based at least in part on the first command, the second access type.

16. The method of claim 11 , wherein the memory device includes a register that includes the default access type.

17. The method of claim 11 , wherein the at least the portion of the memory includes one or more blocks and the second access type is optimized for data lifetime.

18. The method of claim 11 , wherein the default access type is preselected.

19. A host device, comprising:

an interface to couple the host device to a memory device having a memory configured to be accessed according to a plurality of predefined access types, the plurality of predefined access types including a default access type and a second access type; and

a controller configured with logic instructions to:

send first data to the memory device, wherein the first data is stored in a portion of memory according to the default access type;

send at least one command to configure access to the portion of the memory in accordance with the second access type for at least one usage, wherein the second access type replaces the default access type, wherein the default access type is preselected; and

send second data to the memory device, wherein the second data is stored according to the second access type.

20. The host device of claim 19 , wherein the controller is further configured with the logic instructions to:

read one or more registers of the memory device to determine an indication of the plurality of predefined access types.

Assignments (3)

Continuity (11)

References Cited (400)