Granted Patent B2

US 12,738,196 · App. 18/701,699 · Granted Sep 15, 2026

Inventors: Susumu Kawashima (Atsugi, JP); Koji Kusunoki (Isehara, JP); Tomoaki Atsumi (Hadano, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

G09G3/32G09G2310/066G09G2310/08G09G2320/0242G09G2320/0633G09G2330/023

Abstract

Claims (70)

1 . A display device comprising:

a pixel, the pixel comprising:

a pulse-signal-generation portion; and

a light-emitting control portion,

wherein the light-emitting control portion comprises a first transistor, a second transistor, a third transistor, a capacitor, and a light-emitting device,

wherein the pulse-signal-generation portion comprises a fourth transistor and a fifth transistor,

wherein the light-emitting device emits light in accordance with a data potential charged in the light-emitting control portion,

wherein the data potential is discharged in accordance with a pulse signal generated in the pulse-signal-generation portion,

wherein a gate of the first transistor is electrically connected to one electrode of the capacitor, one of a source and a drain of the second transistor, and one of a source and a drain of the third transistor,

wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the light-emitting device and the other electrode of the capacitor,

wherein a first data potential is supplied to the other of the source and the drain of the second transistor,

wherein a gate of the third transistor is electrically connected to one of a source and a drain of the fourth transistor,

wherein a gate of the fourth transistor is electrically connected to one of a source and a drain of the fifth transistor,

wherein the other of the source and the drain of the fourth transistor is electrically connected to a first wiring, and

wherein the other of the source and the drain of the fifth transistor is electrically connected to a second wiring supplying a second data potential.

2 . The display device according to claim 1 ,

wherein the light-emitting device is a micro LED.

3 . An electronic device comprising:

the display device according to claim 1 ; and

a camera.

4 . The display device according to claim 1 , wherein the light-emitting device is configured to be turned off, when the data potential is discharged.

5 . A display device comprising:

a pixel, the pixel comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor;

a sixth transistor;

a capacitor; and

a light-emitting device,

wherein a gate of the first transistor is electrically connected to one of a source and a drain of the second transistor, one of a source and a drain of the third transistor, and one electrode of the capacitor,

wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the light-emitting device and the other electrode of the capacitor,

wherein a first data potential is charged in the gate of the first transistor through the second transistor,

wherein one of a source and a drain of the fourth transistor is electrically connected to one of a source and a drain of the fifth transistor and a gate of the third transistor,

wherein a gate of the fourth transistor is electrically connected to one of a source and a drain of the sixth transistor,

wherein the other of the source and the drain of the fourth transistor is electrically connected to a first wiring, and

wherein the other of the source and the drain of the sixth transistor is electrically connected to a second wiring supplying a second data potential.

6 . The display device according to claim 5 ,

wherein a slope-shaped signal potential is input to the fourth transistor, and

wherein a reset potential is input to the fifth transistor.

7 . The display device according to claim 5 ,

wherein the light-emitting device is configured to emit light, when the first data potential is charged in the gate of the first transistor, and

wherein the light-emitting device is configured to be turned off, when the first data potential charged in the gate of the first transistor is discharged.

8 . A display device comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor;

a first capacitor;

a second capacitor; and

a light-emitting device,

wherein a gate of the first transistor is electrically connected to one of a source and a drain of the second transistor, one of a source and a drain of the third transistor, and one electrode of the first capacitor,

wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the light-emitting device and the other electrode of the first capacitor,

wherein a first data potential is supplied to the other of the source and the drain of the second transistor,

wherein a gate of the third transistor is electrically connected to one of a source and a drain of the fourth transistor and one of a source and a drain of the fifth transistor,

wherein a gate of the fourth transistor is electrically connected to one of a source and a drain of the sixth transistor and one electrode of the second capacitor,

wherein the other of the source and the drain of the fourth transistor is electrically connected to a first wiring supplying a slope signal, and

wherein the other of the source and the drain of the sixth transistor is electrically connected to a second wiring supplying a second data potential.

9 . The display device according to claim 8 , further comprising a seventh transistor,

wherein one of a source and a drain of the seventh transistor is electrically connected to one of the source and the drain of the first transistor.

10 . The display device according to claim 9 ,

wherein each of the first transistor, the second transistor, the third transistor, the fifth transistor, and the sixth transistor is an n-channel transistor, and

wherein the fourth transistor is a p-channel transistor.

11 . The display device according to claim 10 ,

wherein each of the first transistor, the second transistor, the fifth transistor, and the sixth transistor comprises a metal oxide in a channel formation region, and

wherein each of the third transistor and the fourth transistor comprises silicon in a channel formation region.

12 . The display device according to claim 8 ,

wherein each of the second transistor, the fourth transistor, and the sixth transistor is an n-channel transistor, and

wherein each of the first transistor, the third transistor, and the fifth transistor is a p-channel transistor.

13 . The display device according to claim 12 ,

wherein each of the second transistor, the fourth transistor, and the sixth transistor comprises a metal oxide in a channel formation region, and

wherein each of the first transistor, the third transistor, and the fifth transistor comprises silicon in a channel formation region.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (128)