Semiconductor device including backside contact structure formed based on wide placeholder structure
Provided is a semiconductor device including a backside contact structure formed based on a placeholder structure having a wide profile, an a method of manufacturing the same. The method may include: forming a source/drain region; and forming a backside contact structure on a bottom surface of the source/drain region such that a width of an upper portion of the backside contact structure is greater than a width of the source/drain region in a channel-length direction.
1 . A semiconductor device comprising:
a 1 st source/drain region; and
a backside contact structure on a bottom surface of the 1 st source/drain region,
wherein the backside contact structure comprises a conductive material,
wherein a width of an upper portion of the backside contact structure is greater than a width of the 1 st source/drain region in a channel-length direction,
wherein a top surface of the backside contact structure facing the bottom surface of the 1 st source/drain region comprises a concave shape, and
wherein the semiconductor device further comprises a silicon capping layer on the top surface of the backside contact structure and a silicide layer between the silicon capping layer and the bottom surface of the 1 st source/drain region.
2 . The semiconductor device of claim 1 , further comprising:
a gate structure; and
an inner spacer between the gate structure and the 1 st source/drain region,
wherein an uppermost side edge of the backside contact structure is below a bottom surface of the inner spacer in a vertical direction intersecting the channel-length direction.
3 . The semiconductor device of claim 1 , wherein the bottom surface of the 1 st source/drain region is protruded toward the backside contact structure.
4 . The semiconductor device of claim 1 , further comprising a gate structure, wherein a side edge of the backside contact structure is below the gate structure in a vertical direction intersecting the channel-length direction.
5 . The semiconductor device of claim 1 , wherein the 1 st source/drain region is of n-type.
6 . The semiconductor device of claim 1 , further comprising:
a 2 nd source/drain region;
a channel structure connecting the 1 st source/drain region and the 2 nd source/drain region; and
a placeholder structure on a bottom surface of the 2 nd source/drain region,
wherein a width of an upper portion of the placeholder structure is greater than a width of the 2 nd source/drain region in the channel-length direction.
7 . The semiconductor device of claim 6 , wherein the 1 st source/drain region and the 2 nd source/drain region are of n-type.
8 . The semiconductor device of claim 6 , wherein the 1 st source/drain region, the 2 nd source/drain region, and the placeholder structure comprise silicon germanium (SiGe).
9 . The semiconductor device of claim 6 , further comprising:
a gate structure; and
an inner spacer between the gate structure and the 2 nd source/drain region,
wherein an uppermost side edge of the placeholder structure is below a bottom surface of the inner spacer in a vertical direction intersecting the channel-length direction.
10 . A semiconductor device comprising a 1 st transistor and a 2 nd transistor, wherein the 1 st transistor comprises:
a 1 st source/drain region; and
a 1 st backside contact structure on a bottom surface of the 1 st source/drain region,
wherein the 2 nd transistor comprises:
a 2 nd source/drain region; and
a 2 nd backside contact structure on a bottom surface of the 2 nd source/drain region,
wherein an upper portion of the 2 nd backside contact structure has a smaller width than an upper portion of the 1 st backside contact structure,
wherein the 2 nd transistor further comprises a silicon capping layer on a top surface of the 2 nd backside contact structure and a silicide layer between the silicon capping layer and the bottom surface of the 2 nd source/drain region,
wherein the silicon capping layer is between the 1 st backside contact structure and the 1 st source/drain region,
wherein the 1 st backside contact structure has a greater width than the 1 st source/drain region, and
wherein the 2 nd backside contact structure does not have a greater width than the 2 nd source/drain region.
11 . The semiconductor device of claim 10 , wherein the 1 st source/drain region is of n-type, and the 2 nd source/drain region is of p-type.
12 . The semiconductor device of claim 10 , wherein the 1 st transistor further comprises a 3 rd source/drain region and a 3 rd placeholder structure on a bottom surface of the 3 rd source/drain region, and
wherein a width of an upper portion of the 3 rd placeholder structure is greater than a width of the 3 rd source/drain region in a channel-length direction.
13 . The semiconductor device of claim 12 , wherein the 2 nd transistor comprises a 4th source/drain region and a 4th placeholder structure on a bottom surface of the 4th source/drain region, and
wherein a width of an upper portion of the 4th placeholder structure is smaller than the width of the upper portion of the 3 rd placeholder structure.
14 . The semiconductor device of claim 10 , further comprising a backside isolation structure surrounding the 1 st backside contact structure and the 2 nd backside contact structure.
15 . The semiconductor device of claim 1 , further comprising a backside isolation structure surrounding the backside contact structure,
wherein a bottom edge of the 1 st source/drain region is below a top surface of the backside isolation structure.
16 . The semiconductor device of claim 10 , wherein the silicon capping layer is not on a top surface of the 1 st backside contact structure.
17 . The semiconductor device of claim 10 , wherein the 2 nd source/drain region is on an opposite side of the 2 nd backside contact structure with respect to a substrate of the semiconductor device.
18 . The semiconductor device of claim 10 , wherein a top surface of the silicide layer is in contact with the bottom surface of the 1 st source/drain region, and the top surface of the silicide layer comprises a concave shape facing the 1 st source/drain region.