IP Library Granted Patent US 7,335,563
Granted Patent B2
US 7,335,563 · App. 11/164,070 · Granted Feb 26, 2008

Rotated field effect transistors and method of manufacture

Assignee: International Business Machines Corporation
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Quick Facts
Patent No.
US 7,335,563
App. No.
11/164,070
Granted
Feb 26, 2008
Kind
B2
Abstract

An apparatus and method for manufacturing rotated field effect transistors. The method comprises providing a substrate including a first gate structure and a second gate structure, which are not parallel to each other. The method further includes performing a first ion implant substantially orthogonal to an edge of the first gate structure to form a first impurity region and performing a second ion implant at a direction different than that of the first ion implant and substantially orthogonal to an edge of the second gate structure to form a second impurity region under the edge of the second gate structure.

Claims (15)

1. A method, comprising:

providing a substrate including at least a first gate structure and a second gate structure, the first gate structure and the second gate structure are not parallel to each other;

performing a first ion implant at a first angle substantially orthogonal to an edge of the first gate structure to form a first impurity region; and

performing a second ion implant at a second angle substantially orthogonal to the first ion implant to form a second impurity region under an edge of the second gate structure,

wherein a linewidth control of the second gate structure is relaxed.

2. A method, comprising:

providing a substrate including at least a first gate structure and a second gate structure, the first gate structure and the second gate structure are not parallel to each other;

performing a first ion implant at a first angle substantially orthogonal to an edge of the first gate structure to form a first impurity region; and

performing a second ion implant at a second angle substantially orthogonal to the first ion implant to form a second impurity region under an edge of the second gate structure, wherein:

the first gate structure includes two or more gates in parallel;

the second gate structure has a channel length longer than a channel length of the first gate structure;

the first gate structure forms a field effect transistor (FET) of a digital device and the second gate structure forms a FET of an analog device;

a linewidth control of the second gate structure is relaxed;

the first impurity region and the second impurity region are different; and

the first and second ion implant are halo and extension implants.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2020
From: ALSEPHINA INNOVATIONS, INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 053351/0839 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: GLOBALFOUNDRIES INC.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049709/0871 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2005
From: ANDERSON, BRENT A; BRYANT, ANDRES; NA, MYUNG-HEE; NOWAK, EDWARD J.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 016753/0556 →
Continuity (1)
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