IP Library Granted Patent US 7,872,340
Granted Patent B2
US 7,872,340 · App. 12/201,896 · Granted Jan 18, 2011

Integrated circuit package system employing an offset stacked configuration

Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 7,872,340
App. No.
12/201,896
Filed
Aug 29, 2008
Granted
Jan 18, 2011
Kind
B2
Art Unit
2815
USPC
257/686
Abstract

A method for manufacturing an integrated circuit package system includes: providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect.

Claims (42)

1. A method for manufacturing an integrated circuit package system comprising:

providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side;

mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect; and

forming a base package body over the electrical interconnect and a portion of the first integrated circuit and the base substrate.

2. The method as claimed in claim 1 wherein:

mounting the offset package includes forming a first portion over the first integrated circuit and a second portion overhanging the base substrate.

3. The method as claimed in claim 1 wherein:

mounting the offset package includes mounting a flip integrated circuit.

4. A method for manufacturing an integrated circuit package system comprising:

providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and

mounting a first portion of an offset package over the first integrated circuit and a second portion of the offset package overhanging the base substrate, the second portion coupled to the base substrate by a system interconnect.

5. The method as claimed in claim 4 wherein:

providing the first integrated circuit coupled to the base substrate by an electrical interconnect formed on one side includes utilizing lead-in-film structures.

6. The method as claimed in claim 4 wherein:

mounting the offset package includes using an interposer as the system interconnect.

7. The method as claimed in claim 4 wherein:

mounting the offset package includes positioning the offset package to overhang one or more sides of the first integrated circuit.

8. The method as claimed in claim 4 further comprising:

mounting a passive component, an active component, or a. combination thereof on the base substrate.

9. An integrated circuit package system comprising:

a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect on one side; and

an offset package over the base package that overhangs one or more sides of the first integrated circuit, the offset package electrically coupled to the base substrate via a system interconnect.

10. The system as claimed in claim 9 further comprising:

a base package body over the electrical interconnect and a portion of the first integrated circuit and the base substrate.

11. The system as claimed in claim 9 further comprising:

a system package body over the electrical interconnect and around a portion of the offset package.

12. The system as claimed in claim 9 wherein:

the offset package includes a first portion on the first integrated circuit and a second portion overhanging the base substrate.

13. The system as claimed in claim 9 wherein:

the offset package includes a flip integrated circuit.

14. The system as claimed in claim 9 wherein:

the system interconnect includes a solder ball structure.

15. The system as claimed in claim 9 wherein:

the electrical interconnect includes a lead-in-film structure.

16. The system as claimed in claim 9 wherein:

the system interconnect includes an interposer.

17. The system as claimed in claim 9 further comprising:

a passive component, an active component, or a combination thereof on the base substrate.

18. A method for manufacturing an integrated circuit package system comprising:

providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side;

mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect; and

forming a system package body over the electrical interconnect and around a portion of the offset package.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 064783 FRAME 0896. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE CHANGE OF NAME. Recorded Sep 22, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065015/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 14, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064962/0123 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0292) Recorded Aug 30, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE.LTE.
Reel/Frame 064783/0896 →
RELEASE OF SECURITY INTEREST Recorded Jun 12, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052924/0007 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0292 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2008
From: CHOI, DAESIK; HONG, BUMJOON; LEE, SANG-HO; HA, JONG-WOO; PARK, SOO-SAN
To: STATS CHIPPAC LTD.
Reel/Frame 021500/0211 →
Continuity (2)
Provisional Application 6096960000 · Aug 31, 2007
Related Publication 20090057864A1 · Mar 5, 2009