IP Library Granted Patent US 8,222,955
Granted Patent B2
US 8,222,955 · App. 12/818,887 · Granted Jul 17, 2012

Compensated bandgap

Assignee: Microchip Technology Incorporated
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Quick Facts
Patent No.
US 8,222,955
App. No.
12/818,887
Granted
Jul 17, 2012
Kind
B2
Abstract

An integrated circuit has an untrimmed bandgap generation circuit; and a bandgap generation circuit coupled to the untrimmed bandgap generation circuit. The bandgap generation circuit has a current source controlled by the untrimmed bandgap generation circuit and coupled in series with a resistor and a first bipolar diode device, one or more of bipolar diode devices, each bipolar diode device coupled in parallel with the first bipolar diode device, wherein a trimmed bandgap reference voltage output of the integrated circuit is a function of the number of bipolar diode devices.

Claims (28)

1. A bandgap circuit, comprising:

a first order compensated bandgap unit generating a first output voltage, and

a second order compensation circuit adding a second output voltage to said first output voltage and comprising a first metal oxide semiconductor (MOS) transistor coupled in parallel with a first resistor, wherein the first MOS transistor is biased with an inverse proportional to absolute temperature (PTAT) voltage.

2. The bandgap circuit according to claim 1 , wherein the first order compensated bandgap unit comprises first and second bipolar transistors.

3. The bandgap circuit according to claim 2 , wherein the second order compensation circuit comprises a first controllable current source whose output is coupled with a reference potential via a diode connected third bipolar transistor connected in series with a diode connected second MOS transistor, wherein the output of the first current source controls said first MOS transistor.

4. The bandgap circuit according to claim 3 , wherein a second order compensation voltage is added by coupling the second order compensation circuit in series with the first order compensated bandgap unit.

5. The bandgap circuit according to claim 4 , wherein the first order compensated bandgap unit comprises a current mirror being coupled with the first and second bipolar transistors, second and third resistors coupled in series between the first bipolar transistor and a reference potential, wherein the second bipolar transistor is connected with a node between the second and third resistor, and an operational amplifier whose inputs are connected with nodes between the current mirror and the first and second bipolar transistors, respectively and whose output controls the first and second bipolar transistors.

6. The bandgap circuit according to claim 5 , wherein the current mirror is formed by MOS transistors.

7. The bandgap circuit according to claim 5 , wherein the controllable current source is formed by a MOS transistor and coupled with the current mirror.

8. The bandgap circuit according to claim 3 , wherein the first order compensated bandgap unit comprises a second controllable current source being coupled with the first bipolar transistor via series connected second and third resistors and being coupled with the second bipolar transistor via a fourth resistor, and comprises an operational amplifier having a first input coupled with a node between the second and third resistors and a second input coupled with a node between the fourth resistor and the second bipolar transistor and an output which controls the first and second controllable current sources.

9. The bandgap circuit according to claim 2 , wherein the second order compensation circuit comprises first and second controllable current sources and a diode connected second MOS transistor connected in series with a diode connected third bipolar transistor between said first controllable current source and a reference potential, wherein the node between the first controllable current source and the second MOS transistor controls said first MOS transistor and wherein the second controllable current source is coupled with the parallel coupled first MOS transistor and first resistor.

10. The bandgap circuit according to claim 9 , wherein a second order compensation voltage is added by controlling said bipolar transistors of said first order compensated bandgap unit with the second order compensation voltage.

11. The bandgap circuit according to claim 9 , wherein the first order compensated bandgap unit comprises a third controllable current source coupled with ground through a first branch comprising a series connection of second and third resistors and the first bipolar transistor and through a second branch comprising a series connection of a fourth resistor and the second bipolar transistor, an operational amplifier whose inputs are coupled with a node between the second and third resistor and a node between the fourth resistor and the second bipolar transistor, wherein an output of the operational amplifier controls said first, second and third current source.

12. The bandgap circuit according to claim 11 , wherein the first, second and third controllable current sources are formed by MOS transistors.

13. A method for generating a reference voltage, comprising the steps of:

generating a first order compensated bandgap voltage, and

generating a second order compensation voltage using a first metal oxide semiconductor (MOS) transistor coupled in parallel with a first resistor, wherein the first MOS transistor is biased with an inverse proportional to absolute temperature (PTAT) voltage; and

adding the second order compensation voltage to the first order compensated bandgap voltage.

14. The method according to claim 13 , wherein the MOS transistor is operated in the triode region.

15. The method according to claim 13 , wherein the second order compensation voltage is generated by controlling the first MOS transistor with a control signal generated by a controllable current feeding a diode connected third bipolar transistor connected in series with a diode connected second MOS transistor.

16. The method according to claim 13 , wherein the second order compensation voltage is generated by feeding a first current to said parallel coupled first MOS transistor and first resistor and controlling the first MOS transistor by a signal generated by a second current feeding a diode connected second MOS transistor connected in series with a diode connected first bipolar transistor.

17. A bandgap circuit, comprising:

a first order compensated bandgap unit comprising first and second bipolar transistors generating a first output voltage, and

a second order compensation circuit adding a second output voltage to said first output voltage and comprising a first metal oxide semiconductor (MOS) transistor coupled in parallel with a first resistor, wherein the first MOS transistor is biased with an inverse proportional to absolute temperature (PTAT) voltage, wherein the second order compensation circuit comprises a first controllable current source and a diode connected third bipolar transistor connected in series with a diode connected second MOS transistor between said first controllable current source and a reference potential, wherein a voltage created by means of the first controllable current source controls said first MOS transistor.

18. The bandgap circuit according to claim 17 , wherein a second order compensation voltage is added by coupling the second order compensation circuit in series with the first order compensated bandgap unit.

19. The bandgap circuit according to claim 17 , wherein the first order compensated bandgap unit comprises a current mirror being coupled with the first and second bipolar transistors, second and third resistors coupled in series between the first bipolar transistor and a reference potential, wherein the second bipolar transistor is connected with a node between the second and third resistor, and an operational amplifier whose inputs are connected with nodes between the current mirror and the first and second bipolar transistors, respectively and whose output controls the first and second bipolar transistors.

20. The bandgap circuit according to claim 17 , wherein the second order compensation circuit comprises a second controllable current source coupled with the parallel coupled first MOS transistor and first resistor and the first order compensated bandgap unit comprises a third controllable current source coupled with ground through a first branch comprising a series connection of second and third resistors and the first bipolar transistor and through a second branch comprising a series connection of a fourth resistor and the second bipolar transistor, an operational amplifier whose input are coupled with a node between the second and third resistor and a node between the fourth resistor and the second bipolar transistor, wherein an output of the operational amplifier controls said first, second and third current sources.

21. The bandgap circuit according to claim 17 , wherein a second order compensation voltage is added by controlling said bipolar transistors of said first order compensated bandgap unit with the second order compensation voltage.

Assignments (16)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2026
From: MICROCHIP TECHNOLOGY INCORPORATED; MICROCHIP TECHNOLOGY IRELAND LIMITED; MICROSEMI SOC CORPORATION; ATMEL CORPORATION; SILICON STORAGE TECHNOLOGY, INC.; MICROCHIP TECHNOLOGY GERMANY GMBH
To: CRESTONE IP MANAGEMENT, LLC
Reel/Frame 075979/0008 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 059666/0545 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2010
From: DEVAL, PHILIPPE; JOHNER, YANN; VAUCHER, FABIEN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 024561/0079 →
Continuity (2)
Provisional Application 61245908 · Sep 25, 2009
Related Publication 20110074495A1 · Mar 31, 2011