IP Library Granted Patent US 8,402,180
Granted Patent B2
US 8,402,180 · App. 12/748,311 · Granted Mar 19, 2013

Autonomous multi-packet transfer for universal serial bus

Inventors: Einar Fredriksen (Trondheim, NO); Morten Werner Lund (Flatåsen, NO); Vemund Kval Bakken (Elverum, NO)
Assignee: Atmel Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,402,180
App. No.
12/748,311
Granted
Mar 19, 2013
Kind
B2
Abstract

A USB device can be configured for multi-packet data transfer to and from endpoints with minimal software intervention. Minimal software intervention allows a Central Processing Unit (CPU) of the USB device to handle other tasks, maximizing USB bus utilization.

Claims (90)

1. A method of multi-packet data transfer on a Universal Serial Bus (USB), comprising:

receiving a setup request from a USB host to read data from an endpoint in a USB device;

determining a maximum data packet size for the endpoint, wherein the maximum data packet size is less than an amount of data to be read from the endpoint;

determining a number of packets needed for the data transfer based on the amount of data to be read by the USB host and the maximum data packet size;

receiving a first token packet from the USB host, wherein the first token packet requests a first data packet;

responsive to the first token packet, transferring the first data packet to the USB host using a USB device controller, where the transferring occurs without interrupting a Central Processing Unit (CPU), the transferring comprising:

providing a control signal to a memory arbiter to access the data to be read from a buffer of the endpoint;

accessing the data based on a start address provided by the CPU; and

providing the first data packet based on the accessed data;

during processing of the setup request by the USB device controller, receiving and accepting a second token packet from the USB host requesting a second data packet transfer, wherein receiving the second token packet occurs without interrupting the CPU and prevents transmission of NAK packets; and

after transferring the number of packets needed for the data transfer, generating an interrupt for the CPU.

2. The method of claim 1 , where transferring the first data packet further comprises:

determining that a remaining number of data bytes to be read from the endpoint is equal to or greater than the maximum data packet size; and

transmitting the first data packet to the USB host containing a number of data bytes equal to the maximum data packet size.

3. The method of claim 1 , where transferring the first data packet further comprises:

determining that a remaining number of data bytes to be read from the endpoint is less than the maximum data packet size; and

in response to the second token packet, transmitting a second data packet to the USB host containing the remaining number of data bytes to be transferred to the USB host.

4. The method of claim 1 , comprising:

determining that the number of data bytes to be read from the endpoint is an integral multiple of the maximum data packet size; and

transmitting a second data packet containing zero bytes of data.

5. The method of claim 1 , comprising:

updating a toggle status for one or more non-isochronous endpoints.

6. A method of multi-packet data transfer on a Universal Serial Bus (USB), comprising:

receiving a setup request from a USB host to write data to an endpoint in a USB device;

determining a maximum data packet size for the endpoint, wherein the maximum data packet size is less than an amount of data to be written to the endpoint;

determining a number of packets needed for the data transfer based on the amount of data to be written to the USB device and the maximum data packet size;

receiving a first token packet from the USB host, wherein the first token packet requests to transmit a first data packet to the USB device;

responsive to the first token packet, receiving the first data packet at the USB device using a USB device controller, where the receiving occurs without interrupting a Central Processing Unit (CPU), the receiving comprising:

providing a control signal to a memory arbiter to write the data at a buffer of the endpoint; and

writing the data based on a start address provided by the CPU;

sending, to the USB host, an acknowledgement packet that the first data packet was received without error;

during processing of the setup request by the USB device controller, receiving and accepting a second token packet from the USB host requesting a second data packet transfer, wherein receiving the second token packet occurs without interrupting the CPU and prevents transmission of NAK packets; and

after receiving the number of packets needed for the data transfer, generating an interrupt for the CPU.

7. The method of claim 6 , where receiving the first data packet comprises:

determining that a remaining number of data bytes to be written to the endpoint is equal to or greater than the maximum data packet size; and

receiving the first data packet from the USB host containing a number of data bytes equal to the maximum data packet size.

8. The method of claim 6 , where receiving the first data packet further comprises:

determining that a remaining number of data bytes to be written to the endpoint is less than the maximum data packet size; and

in response to the second token packet, receiving a second data packet from the USB host containing the remaining number of data bytes to be written to the endpoint.

9. The method of claim 6 , comprising:

determining that the number of data bytes to be written to the endpoint is an integral multiple of the maximum data packet size; and

receiving a second data packet from the USB host containing zero bytes of data.

10. The method of claim 6 , comprising:

updating a toggle status for one or more non-isochronous endpoints.

11. A Universal Serial Bus (USB) device, comprising:

an interface configured for receiving a setup request from a USB host to read data from an endpoint in the USB device;

a USB device controller coupled to the interface and configured to perform operations comprising:

determining a maximum data packet size for the endpoint;

determining a number of packets needed for the data transfer based on the amount of data to be read by the USB host and the maximum data packet size;

receiving a first token packet from the USB host, wherein the first token packet requests a first data packet;

responsive to the first token packet, transferring the first data packet to the USB host using the USB device controller, where the transferring occurs without interrupting a Central Processing Unit (CPU), the transferring comprising:

providing a control signal to a memory arbiter to access the data to be read from a buffer of the endpoint;

accessing the data based on a start address provided by the CPU; and

providing the first data packet based on the accessed data;

during processing of the setup request by the USB device controller, receiving and accepting a second token packet from the USB host requesting a second data packet transfer, wherein receiving the second token packet occurs without interrupting the CPU and prevents transmission of NAK packets; and

after transferring the number of packets needed for the data transfer, generating an interrupt for the CPU.

12. The device of claim 11 , where the USB device controller is further configured to perform operations comprising:

determining that a remaining number of data bytes to be read from the endpoint is equal to or greater than the maximum data packet size; and

transmitting the first data packet to the USB host containing a number of data bytes equal to the maximum data packet size.

13. The device of claim 11 , where the USB device controller is further configured to perform operations comprising:

determining that a remaining number of data bytes to be read from the endpoint is less than the maximum data packet size; and

in response to the second token packet, transmitting a second data packet to the USB host containing the remaining number of data bytes to be transferred to the USB host.

14. The device of claim 11 , where the controller is further configured to perform operations comprising:

determining that the number of data bytes to be read from the endpoint is an integral multiple of the maximum data packet size; and

transmitting a second data packet containing zero bytes of data.

15. The device of claim 11 , where the controller is further configured to perform an operation comprising:

updating a toggle status for one or more non-isochronous endpoints.

16. A Universal Serial Bus (USB) device, comprising:

an interface configured for receiving a setup request from a USB host to write data to an endpoint in the USB device;

a USB device controller coupled to the interface and configured to perform operations comprising:

determining a maximum data packet size for the endpoint, wherein the maximum data packet size is less than an amount of data to be written to the endpoint;

determining a number of packets needed for the data transfer based on the amount of data to be written to the USB device and the maximum data packet size;

receiving a first token packet from the USB host, wherein the first token packet requests to transmit a first data packet to the USB device;

responsive to the first token packet, receiving the first data packet at the USB device using a USB device controller, where the receiving occurs without interrupting a Central Processing Unit (CPU), the receiving comprising:

providing a control signal to a memory arbiter to write the data at a buffer of the endpoint; and

writing the data based on a start address provided by the CPU;

sending, to the USB host, an acknowledgement packet that the first data packet was received without error;

during processing of the setup request by the USB device controller, receiving and accepting a second token packet from the USB host requesting a second data packet transfer, wherein receiving the second token packet occurs without interrupting the CPU and prevents transmission of NAK packets; and

after receiving the number of packets needed for the data transfer, generating an interrupt for the CPU.

17. The device of claim 16 , where the USB device controller is further configured for performing operations comprising:

determining that a remaining number of data bytes to be written to the endpoint is equal to or greater than the maximum data packet size; and

receiving the first data packet from the USB host containing a number of data bytes equal to the maximum data packet size.

18. The device of claim 16 , where the USB device controller is further configured to perform operations comprising:

determining that a remaining number of data bytes to be written to the endpoint is less than the maximum data packet size; and

in response to the second token packet, receiving a second data packet from the USB host containing the remaining number of data bytes to be written to the endpoint.

19. The device of claim 16 , where the USB device controller is further configured to perform operations comprising:

determining that the number of data bytes to be written to the endpoint is an integral multiple of the maximum data packet size; and

receiving a second data packet from the USB host containing zero bytes of data.

20. The device of claim 16 , where the USB device controller is further configured to perform operations, comprising:

updating a toggle status for one or more non-isochronous endpoints.

Assignments (17)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2010
From: FREDRIKSEN, EINAR; LUND, MORTEN WERNER; BAKKEN, VEMUND KVAL
To: ATMEL CORPORATION
Reel/Frame 024271/0372 →
Continuity (1)
Related Publication 20110238869A1 · Sep 29, 2011