IP Library Granted Patent US 8,736,190
Granted Patent B2
US 8,736,190 · App. 13/427,779 · Granted May 27, 2014

Primary side PFC driver with dimming capability

Inventors: Jeff Kotowski (Nevada City, CA); Charles Cai (San Jose, CA); Ranajit Ghoman (Santa Clara, CA)
Assignee: ATMEL Corporation
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Quick Facts
Patent No.
US 8,736,190
App. No.
13/427,779
Filed
Mar 22, 2012
Granted
May 27, 2014
Kind
B2
Art Unit
2844
USPC
315/247
Abstract

A primary side PFC driver circuit is disclosed that includes a switch control circuit for commanding a switch to allow an inductor coupled to an output load (e.g., LEDs) to transfer energy provided by an input voltage source. The switch control circuit provides two signals for commanding the switch. A first signal having a first frequency, with a duty cycle in proportion to the input voltage amplitude, commands the switch to allow the average input current to be proportional to the input voltage amplitude. A second signal having a second frequency higher than the first frequency pulses the output load with substantially constant current pulses based on a value of the first signal (e.g., while the first signal is high). The current pulses produce a substantially constant current in the output load.

Claims (60)

1. A single stage, primary side, Power Factor Correction (PFC) driver circuit, the circuit comprising:

a rectifier circuit configured to rectify an alternating input voltage;

an inductor coupled in series with the rectifier circuit;

a diode coupled in series with the inductor and an output load;

a switch coupled to the inductor;

a switch control circuit coupled to the switch and configured for:

generating a first signal for commanding the switch to allow the inductor to transfer energy provided by a rectified input voltage to the output load, the first signal having a first frequency with a duty cycle in proportion to an amplitude of the rectified input voltage; generating a second signal for commanding the switch, the second signal having a second frequency that is higher than the first frequency; and

commanding the switch with the second signal based on the first signal, the commanding causing a substantial constant pulse current to be provided to the output load.

2. The circuit of claim 1 , where the rectifier circuit is a diode bridge.

3. The circuit of claim 1 , where the diode is a Schotky diode.

4. The circuit of claim 1 , further comprising:

a capacitor coupled in parallel with the output load.

5. The circuit of claim 1 , where the output load includes one or more light emitting diodes.

6. The circuit of claim 1 , where the switch is a power transistor.

7. The circuit of claim 6 , where the command terminal is a gate of the power transistor.

8. The circuit of claim 1 , where the switch control circuit further comprises:

a logic circuit configured for receiving a first waveform and a second waveform and providing an output based on the first waveform and the second waveform;

a latch circuit having a first input coupled to the output of the logic circuit and an output coupled to a command terminal of the switch, the latch circuit configured for setting a command voltage on the command terminal based at least in part on the output of the logic circuit; and

a comparator having a first input coupled to the switch, a second input coupled to a reference voltage and an output coupled to the latch circuit, where the comparator is configured for resetting the latch circuit based on a comparison of the first and second comparator inputs.

9. The circuit of claim 8 , further comprising:

a sense resistor coupled to the switch device and the first input of the comparator.

10. The circuit of claim 8 , where the latch is a flip-flop.

11. A single stage, primary side, Power Factor Correction (PFC) driver circuit, the circuit comprising:

a rectifier circuit configured to rectify an alternating input voltage;

a diode coupled in parallel to the rectifier circuit and an output load;

an inductor coupled in series with the output load;

a switch coupled to the inductor;

a switch control circuit coupled to the switch and configured for:

generating a first signal for commanding the switch to allow the inductor to transfer energy provided by the rectified input voltage to the output load, the first signal having a first frequency with a duty cycle in proportion to an amplitude of the rectified input voltage; generating a second signal for commanding the switch, the second signal having a second frequency that is higher than the first frequency; and

commanding the switch with the second signal based on the first signal, the commanding causing a substantial constant pulse current to be provided to the output load.

12. The circuit of claim 11 , where the rectifier circuit is a diode bridge.

13. The circuit of claim 11 , where the switch is a power transistor.

14. The circuit of claim 11 , where the diode is a Schotky diode.

15. The circuit of claim 11 , further comprising:

a capacitor coupled in parallel with the output load.

16. The circuit of claim 11 , where the output load includes one or more light emitting diodes.

17. The circuit of claim 11 , where the switch control circuit further comprises:

a logic circuit configured for receiving a first waveform and a second waveform and providing an output based on the first waveform and the second waveform;

a latch circuit having a first input coupled to the output of the logic circuit and an output coupled to a command terminal of the switch, the latch circuit configured for setting a command voltage on the command terminal based at least in part on the output of the logic circuit; and

a comparator having a first input coupled to the switch, a second input coupled to a reference voltage and an output coupled to the latch circuit, where the comparator is configured for resetting the latch circuit based on a comparison of the first and second comparator inputs.

18. The circuit of claim 17 , further comprising:

a sense resistor coupled to the switch device and the first input of the comparator.

19. The circuit of claim 17 , where the latch is a flip-flop.

20. The circuit of claim 17 , where the command terminal is a gate of the power transistor.

21. A method of driving a light emitting diode (LED), comprising:

generating a first waveform for commanding a switch to allow an inductor coupled to the LED to transfer energy provided by an input voltage to the LED, the first waveform having a first frequency with a duty cycle in proportion to an amplitude of the input voltage;

generating a second waveform for commanding the switch, the second waveform having a second frequency that is higher than the first frequency, where a ratio of the input voltage to the duty cycle of the second waveform is scaled to allow dimming of LED brightness; and

commanding the switch with the second waveform based on the first waveform to provide a substantially constant current pulse to the LED.

22. A method of driving a light emitting diode (LED), comprising:

generating a first waveform for commanding a switch to allow an inductor coupled to the LED to transfer energy provided by an input voltage source to the LED, the first waveform having a first frequency with a duty cycle in proportion to an amplitude of the input voltage source;

generating a second waveform for commanding the switch, the second waveform having a second frequency that is higher than the first frequency, where the duty cycle of the second waveform is generated by:

detecting a zero crossing point of the input voltage source;

synthesizing a voltage for generating the second waveform using the detected zero crossing point; and

commanding the switch with the second waveform based on the first waveform to provide a substantially constant current pulse to the LED.

23. The method of claim 22 , where an amplitude of the synthesized voltage can be set based on a brightness requirement for the LED.

24. A method of driving a light emitting diode (LED), comprising:

generating a first waveform for commanding a switch to allow an inductor coupled to the LED to transfer energy provided by an input voltage to the LED, the first waveform having a first frequency with a duty cycle in proportion to an amplitude of the input voltage;

generating a second waveform for commanding the switch, the second waveform having a second frequency that is higher than the first frequency; and

commanding the switch with the second waveform based on the first waveform to provide a substantially constant current pulse to the LED,

where a ramp rate for current charging the inductor is phase-locked to the input voltage, and maximum and minimum ramp rates corresponding to peaks and valley, respectively, of the input voltage, are used to phase the first and second waveforms.

Assignments (17)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2012
From: KOTOWSKI, JEFF; CAI, CHARLES; GHOMAN, RANAJIT
To: ATMEL CORPORATION
Reel/Frame 028824/0722 →
Continuity (2)
Continuation 13249158 · Sep 29, 2011
Related Publication 20130083578A1 · Apr 4, 2013