Semiconductor device and method of forming high-attenuation balanced band-pass filter
A semiconductor device has a substrate and band-pass filter formed over the substrate. The band-pass filter includes a first conductive trace wound to exhibit inductive properties with a first end coupled to a first terminal of the semiconductor device and second end coupled to a second terminal of the semiconductor device, and first capacitor coupled between the first and second ends of the first conductive trace. A second conductive trace is wound to exhibit inductive properties with a first end coupled to a third terminal of the semiconductor device and second end coupled to a fourth terminal of the semiconductor device. The second conductive trace has a different size and shape as the first conductive trace. A second capacitor is coupled between the first and second ends of the second conductive trace. A third conductive trace is wound around the first and second conductive traces to exhibit inductive properties.
1. A semiconductor device, comprising:
a substrate; and
a band-pass filter formed over the substrate, the band-pass filter including,
(a) a first conductive trace wound to exhibit an inductive property,
(b) a second conductive trace wound to exhibit an inductive property, the second conductive trace having no overlapping portion with the first conductive trace and including a different size and shape than the first conductive trace, and
(c) a third conductive trace wound around the first and second conductive traces to exhibit an inductive property with a first distance between the third conductive trace and the first conductive trace and a second distance different than the first distance between the third conductive trace and the second conductive trace.
2. The semiconductor device of claim 1 , further including:
a first capacitor coupled between first and second ends of the first conductive trace;
a second capacitor coupled between first and second ends of the second conductive trace; and
a third capacitor coupled between first and second ends of the third conductive trace.
3. The semiconductor device of claim 1 , wherein the first and second conductive traces each have an oval, circular, polygonal, or conformal shape.
4. The semiconductor device of claim 1 , wherein the first and second conductive traces have a coupling coefficient less than 0.2, and the first and third conductive traces have a coupling coefficient less than 0.2, and the second and third conductive traces have a coupling coefficient less than 0.2.
5. The semiconductor device of claim 1 , further including a center tap coupled midway between the first and second ends of the second conductive trace.
6. A semiconductor device, comprising:
a substrate;
a first conductive trace formed over the substrate and wound to exhibit an inductive property;
a second conductive trace formed over the substrate and wound to exhibit an inductive property, the second conductive trace being disposed over the substrate outside a perimeter of the first conductive trace and inductively coupled with the first conductive trace and including a different size and shape than the first conductive trace; and
a third conductive trace formed over the substrate and wound around the first and second conductive traces to exhibit an inductive property.
7. The semiconductor device of claim 6 , further including:
a first capacitor formed over the substrate and coupled between first and second ends of the first conductive trace; and
a second capacitor formed over the substrate and coupled between first and second ends of the second conductive trace.
8. The semiconductor device of claim 7 , further including a third capacitor formed over the substrate and coupled between first and second ends of the third conductive trace.
9. The semiconductor device of claim 6 , wherein the first and second conductive traces each have an oval, circular, polygonal, or conformal shape.
10. The semiconductor device of claim 6 , wherein the first and second conductive traces have a coupling coefficient less than 0.2, and the first and third conductive traces have a coupling coefficient less than 0.2, and the second and third conductive traces have a coupling coefficient less than 0.2.
11. The semiconductor device of claim 6 , further including a center tap coupled midway between first and second ends of the second conductive trace.
12. A semiconductor device, comprising:
a substrate;
a first inductor disposed over the substrate;
a second inductor disposed over the substrate outside a perimeter of the first inductor and inductively coupled with the first inductor and including a different size and shape than the first inductor, the first inductor being disposed over the substrate outside a perimeter of the second inductor; and
a third inductor formed around the first and second inductors.
13. The semiconductor device of claim 12 , wherein the first inductor includes a first conductive trace wound to exhibit an inductive property.
14. The semiconductor device of claim 13 , wherein the second inductor includes a second conductive trace wound to exhibit an inductive property.
15. The semiconductor device of claim 14 , wherein the third inductor includes a third conductive trace wound to exhibit an inductive property.
16. The semiconductor device of claim 15 , further including:
a first capacitor formed over the substrate and coupled between first and second ends of the first conductive trace; and
a second capacitor formed over the substrate and coupled between first and second ends of the second conductive trace.
17. The semiconductor device of claim 16 , further including a third capacitor formed over the substrate and coupled between first and second ends of the third conductive trace.
18. The semiconductor device of claim 14 , wherein the first and second conductive traces each have an oval, circular, polygonal, or conformal shape.
19. The semiconductor device of claim 14 , further including a center tap coupled midway between the first and second ends of the second conductive trace.
20. A method of forming a semiconductor device, comprising:
providing a substrate;
forming a first conductive trace over the substrate and wound to exhibit an inductive property;
forming a second conductive trace over the substrate and wound to exhibit an inductive property, the second conductive trace being disposed over the substrate outside a perimeter of the first conductive trace and including a different size and shape than the first conductive trace, the first conductive trace being disposed over the substrate outside a perimeter of the second conductive trace; and
forming a third conductive trace over the substrate and wound around the first and second conductive traces to exhibit an inductive property.
21. The method of claim 20 , further including:
forming a first capacitor over the substrate and coupled between first and second ends of the first conductive trace; and
forming a second capacitor over the substrate and coupled between first and second ends of the second conductive trace.
22. The method of claim 21 , further including forming a third capacitor over the substrate and coupled between first and second ends of the third conductive trace.
23. The method of claim 22 , wherein the first, second, and third conductive traces, and first, second, and third capacitors operate as a band-pass filter.
24. The method of claim 20 , wherein the first and second conductive traces each have an oval, circular, polygonal, or conformal shape.
25. The method of claim 20 , further including a center tap coupled midway between the first and second ends of the second conductive trace.
26. A method of making a semiconductor device, comprising:
providing a substrate;
disposing a first inductor over the substrate;
disposing a second inductor over the substrate outside a perimeter of the first inductor and inductively coupled with the first inductor and including a different size and shape than the first inductor, and the first inductor disposed over the substrate outside a perimeter of the second inductor; and
forming a third inductor around the first and second inductors.
27. The method of claim 26 , wherein the first inductor includes a first conductive trace wound to exhibit an inductive property, the second inductor includes a second conductive trace wound to exhibit an inductive property, the third inductor includes a third conductive trace wound to exhibit an inductive property.
28. The method of claim 27 , further including:
forming a first capacitor over the substrate between first and second ends of the first conductive trace; and
forming a second capacitor over the substrate between first and second ends of the second conductive trace.
29. The method of claim 28 , further including forming a third capacitor over the substrate between first and second ends of the third conductive trace.
30. The method of claim 27 , wherein the first and second conductive traces each have an oval, circular, polygonal, or conformal shape.
31. The method of claim 27 , further including providing a center tap midway between first and second ends of the second conductive trace.
32. The method of claim 27 , wherein the first and second conductive traces have a coupling coefficient less than 0.2, and the first and third conductive traces have a coupling coefficient less than 0.2, and the second and third conductive traces have a coupling coefficient less than 0.2.