Using low voltage regulator to supply power to a source-biased power domain
A common (ground) of a low voltage regulator is connected to a virtual common (ground) of an integrated circuit device that is also connected to transistor sources but isolated from a true ground connected to the substrate of the integrated circuit device. The regulated output voltage from the low voltage regulator rises the same as the virtual ground voltage rises when back-biased sufficient to reduce leakage current to an acceptable level in a given process technology. Therefore, the output of the low voltage regulator will maintain a normal operating voltage for the logic during a power saving back-biased condition.
1. An integrated circuit device comprising at least one power domain with a true ground connection and a virtual ground connection and a low voltage regulator, wherein the low voltage regulator having a ground connection coupled to the virtual ground of the at least one power domain, wherein the virtual ground is raised with respect to the true ground in a low power operation mode of the integrated circuit device, an input coupled to a supply voltage, and an output coupled to and supplying a regulated voltage to transistors in the at least one power domain; and
wherein the true ground is coupled to a substrate of the integrated circuit die, wherein when the virtual ground is raised relative to the true ground sufficient to reduce leakage current to an acceptable level in a given process technology, the output voltage of the low voltage regulator rises with the virtual ground voltage.
2. The integrated circuit device according to claim 1 , wherein the regulated voltage from the low voltage regulator is approximately the normal operating voltage for logic minus an offset voltage at the virtual ground sufficient to reduce the leakage current to the acceptable level in the given process technology.
3. The integrated circuit device according to claim 2 , wherein the regulated voltage from the low voltage regulator is approximately 1.2 volts for 180 nanometer process technology.
4. The integrated circuit device according to claim 1 , wherein the virtual around is raised with a ground offset voltage relative to the true ground sufficient to reduce leakage current to an acceptable level in the given process technology.
5. The integrated circuit device according to claim 4 , wherein the ground offset voltage is about 0.6 volts for 180 nanometer process technology.
6. The integrated circuit device according to claim 1 , wherein the true ground is at substantially zero (0) volts.
7. The integrated circuit device according to claim 1 , wherein a bias current of the low voltage regulator is about 100 nanoamperes.
8. The integrated circuit device according to claim 7 , wherein the substrate is a p-substrate having holes as majority carriers.
9. The integrated circuit device according to claim 8 , wherein the virtual ground is coupled to sources of n-mos transistors fabricated in the p-substrate.
10. The integrated circuit device according to claim 1 , wherein the low voltage regulator is used to power the at least one power domain during said low power operation mode.
11. A method for powering an integrated circuit device with a low voltage regulator, said method comprising the steps of:
coupling a ground connection of the low voltage regulator to a virtual ground of at least one power domain in the integrated circuit device,
coupling an input of the low voltage regulator to a supply voltage, and supplying a regulated voltage to transistors in the at least one power domain;
coupling a true ground to a substrate of the integrated circuit device; and
raising the virtual ground relative to the true ground sufficient to reduce leakage current to an acceptable level in a given process technology, wherein the output voltage of the low voltage regulator rises with the virtual ground voltage.
12. The method according to claim 11 , wherein the regulated voltage from the low voltage regulator is approximately the normal operating voltage for logic minus an offset voltage at the virtual ground sufficient to reduce the leakage current to the acceptable level in the given process technology.
13. The method according to claim 11 , wherein during the step of raising the virtual ground voltage is performed by a ground offset voltage sufficient to reduce leakage current to an acceptable level in the given process technology.
14. The method according to claim 11 , wherein the true ground is at substantially zero (0) volts.
15. The method according to claim 11 , wherein a bias current of the low voltage regulator is about 100 nanoamperes.
16. The method according to claim 11 , wherein the substrate is a p-substrate having holes as majority carriers.
17. The method according to claim 11 , wherein the virtual ground comprises the step of coupling sources of n-mos transistors fabricated in the p-substrate to the virtual ground.
18. The method according to claim 11 , further comprising the step of powering the at least one power domain with the low voltage regulator while said virtual ground is raised.
19. The integrated circuit device according to claim 1 , further comprising a main voltage regulator having an input operable to be coupled with a power supply voltage, an output providing a regulated voltage and a ground connection coupled with the true ground, and a switching unit operable to either connect the input of the main voltage regulator or the input of the low voltage regulator with said power supply voltage and either connect the output of the main voltage regulator or the output of the low voltage regulator, respectively with an internal power supply connection of the integrated circuit device.
20. An integrated circuit device comprising a linear low voltage regulator, wherein:
the linear low voltage regulator having a ground connection coupled to a virtual ground of at least one power domain in the integrated circuit die that is capable of being back-biased, an input coupled to a supply voltage, and an output coupled to and supplying a regulated voltage to transistors in the at least one power domain; and
a true ground is coupled to a substrate of the integrated circuit die, wherein when the virtual ground through back-biasing is raised relative to the true ground sufficient to reduce leakage current to an acceptable level in a given process technology, the output voltage of the linear low voltage regulator rises with the virtual ground voltage.