IP Library › Granted Patent US 10,254,815
Granted Patent B2
US 10,254,815 · App. 14/182,024 · Granted Apr 9, 2019

Using capacitive proximity detection with resistive touch screens for wake-up

Inventor: Keith E. Curtis (Gilbert, AZ)
Assignee: MICROCHIP TECHNOLOGY INCORPORATED
G06F1/3262G06F1/3215G06F1/3231G06F3/044G06F3/045G06F3/0416Y02D10/173
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Quick Facts
Patent No.
US 10,254,815
App. No.
14/182,024
Granted
Apr 9, 2019
Kind
B2
Abstract

Power consumption of a device having a resistive touch screen may be reduced if the resistive touch screen is not scanned unless a touch thereto is imminent, especially if the device can remain in a low power sleep mode during no-touch inactivity. Furthermore, detecting a potential touch earlier then an actual first touch may improve initial touch response time. The resistive touch screen may comprise top and bottom Indium Tin Oxide (ITO) coated planes. The top ITO coated plane may be used as a capacitive proximity detector and the bottom ITO coated plane may be used as a guard shield for the top ITO coated plane to significantly reduce parasitic capacitance thereof and enhance the sensitivity of capacitive proximity detection. The device may also remain in a low power sleep mode until a potential touch is detected thereby further saving device power consumption.

Claims (52)

1. An apparatus having a capacitive proximity detector and a resistive touch screen, comprising:

a first conductive plane having a resistance between opposite edges thereof;

a second conductive plane having a resistance between opposite edges thereof and located parallel with the first conductive plane;

a first pair of tri-state drivers, wherein an output from one of the first pair is coupled to an edge of the first conductive plane and an output from the other one of the first pair is coupled to an opposite edge of the first conductive plane;

a second pair of tri-state drivers, wherein an output from one of the second pair is coupled to an edge of the second conductive plane and an output from the other one of the second pair is coupled to an opposite edge of the second conductive plane;

wherein the coupled edges of the first conductive plane are substantially perpendicular to the coupled edges of the second conductive plane;

a multiplexer having inputs coupled to respective ones of the edges of the first and second conductive planes;

an analog-to-digital converter (ADC) having an analog input coupled to an output of the multiplexer;

a capacitance measurement circuit coupled to one of the edges of the first conductive plane; and

a digital processor having digital outputs coupled to signal and tri-state control inputs of the first and second pairs of tri-state drivers, a multiplexer control output coupled to the multiplexer, at least one input and at least one output coupled to the capacitance measurement circuit, and at least one digital input coupled to at least one digital output of the ADC;

wherein

the digital processor charges the first conductive plane to a first voltage with at least one of the first pair of tri-state drivers,

the first conductive plane is coupled to the capacitance measurement circuit and the analog input of the ADC through the multiplexer,

the capacitance measurement circuit modifies the first voltage on the first conductive plane, the ADC samples the modified first voltage and provides a digital representation thereof to the digital processor;

the digital processor determines whether a change in the modified first voltage indicates an object proximate to an outward face of the first conductive plane; and

if the object is determined to be proximate to the outward face of the first conductive plane then the digital processor uses the first and second tri-state drivers to configure the first and second conductive planes into a resistive touch screen.

2. The apparatus according to claim 1 , wherein the modified first voltage represents a capacitance of the first conductive plane.

3. The apparatus according to claim 1 , wherein the capacitance measurement circuit comprises a capacitive voltage divider (CVD) circuit.

4. The apparatus according to claim 1 , wherein the capacitance measurement circuit comprises a charge time measurement unit (CTMU) circuit.

5. The apparatus according to claim 1 , wherein the first conductive plane is a flexible substrate coated with Indium Tin Oxide (ITO).

6. The apparatus according to claim 5 , wherein the first conductive plane is substantially transparent.

7. The apparatus according to claim 5 , wherein the second conductive plane is coated with Indium Tin Oxide (ITO) and the ITO coatings of the first and second conductive planes face each other, whereby when a touch is applied to the face of the first conductive plane the ITO coatings between the first and second conductive planes make contact at a location of the touch and the digital processor thereby determines the touch location.

8. The apparatus according to claim 1 , wherein the digital processor charges the second conductive plane to the first voltage with at least one of the second pair of tri-state drivers.

9. The apparatus according to claim 1 , wherein the first and second pairs of tri-state drivers, the multiplexer, the ADC, the capacitance measurement circuit and the digital processor are provided in a microcontroller integrated circuit.

10. The apparatus according to claim 9 , wherein the microcontroller integrated circuit has a low power sleep mode that periodically wakes up sufficient circuits therein to determine whether an object is proximate to the outward face of the first conductive plane.

11. The apparatus according to claim 1 , wherein the object comprises a fingertip of a user.

12. The apparatus according to claim 1 , wherein the first voltage is at substantially a power supply voltage.

13. The apparatus according to claim 1 , wherein the first voltage is at substantially a power supply common.

14. A method for determining whether an object is proximate to a resistive touch screen and thereafter enabling the resistive touch screen for determining touches thereto, the method comprising:

providing a first conductive plane having a resistance between opposite edges thereof:

providing a second conductive plane having a resistance between opposite edges thereof and located parallel with the first conductive plane,

providing at least a first tri-state driver, wherein an output from the first tri-state driver is coupled to an edge of the first conductive plane;

providing a pair of second tri-state drivers, wherein an output from one of the second tri-state drivers is coupled to an edge of the second conductive plane and an output from the other one of the second tri-state driver is coupled to an opposite edge of the second conductive plane, wherein the coupled edges of the first conductive plane are substantially perpendicular to the coupled edges of the second conductive plane;

providing a multiplexer having inputs coupled to respective ones of the edges of the first and second conductive planes;

providing an analog-to-digital converter (ADC) having an analog input coupled to an output of the multiplexer; and

providing a capacitance measurement circuit coupled to one of the edges of the first conductive plane;

while no touch has been detected, said method comprising the steps of:

charging the first conductive plane by coupling the first conductive plane with the first tri-state driver generating a first DC voltage;

controlling the first tri-state driver to be in high impedance and coupling the charged first conductive plane to the capacitance measurement circuit and coupling the first conductive plane with the analog input of the ADC through said multiplexer, wherein the capacitance measurement circuit is a capacitive voltage divider or wherein the capacitance measurement circuit is a charge time measurement unit comprising a constant current source charging or discharging the first conductive plane;

modifying a first charge on the first conductive plane with the capacitance measurement circuit;

measuring a modified first DC voltage with said ADC;

determining from the measured modified first DC voltage whether an object is proximate to the first conductive plane;

reconfiguring the first conductive plane and a second conductive plane parallel to the first conductive plane into a resistive touch screen when the object has been determined to be proximate to the first conductive plane; and

scanning the first and second conductive planes to determine where a touch is applied thereto.

15. The method according to claim 14 , further comprising the step of charging the second conductive plane to the second charge after the step of charging the first conductive plane to the first charge.

16. The method according to claim 14 , further comprising the step of maintaining a low power sleep mode and periodically waking up from the low power sleep mode to detect the object proximate to the top conductive plane.

17. The method according to claim 14 , wherein the first conductive plane is a flexible substrate coated with Indium Tin Oxide (ITO).

18. The method according to claim 14 , wherein the second conductive plane is coated with Indium Tin Oxide (ITO) and the ITO coatings of the first and second conductive planes face each other, whereby when the touch is applied to the face of the first conductive plane the ITO coatings between the first and second conductive planes make contact at where the touch is applied thereto and a touch location is thereby determined.

19. The method according to claim 14 , wherein the capacitance measurement circuit is a capacitive voltage divider.

20. The method according to claim 14 , wherein the capacitance measurement circuit is a charge time measurement unit comprising a constant current source charging or discharging the first conductive plane.

21. The method according to claim 14 , wherein the step of charging the first conductive plane to the first charge is performed by an I/O port of a microcontroller.

22. The method according to claim 21 , wherein the I/O port comprises the tri-state driver.

Assignments (15)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 059666/0545 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2014
From: CURTIS, KEITH E.
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 032719/0099 →
Continuity (2)
Provisional Application 61775315 · Mar 8, 2013
Related Publication 20140253500A1 · Sep 11, 2014