IP Library › Granted Patent US 11,756,966
Granted Patent B2
US 11,756,966 · App. 17/980,693 · Granted Sep 12, 2023

Logic circuit and semiconductor device

Inventors: Shunpei Yamazaki (Setagaya, JP); Jun Koyama (Sagamihara, JP); Masashi Tsubuku (Atsugi, JP); Kosei Noda (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1255G09G3/20G09G3/2092G09G3/3291G09G3/36G11C19/184G11C19/28H01L27/124H01L27/1222H01L27/1225H01L29/7869H03K17/161H03K19/00315H03K19/096G09G3/3233G09G3/3648G09G2300/0439G09G2300/08G09G2300/0842G09G2310/0267G09G2310/0275G09G2310/0286G09G2310/08
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Quick Facts
Patent No.
US 11,756,966
App. No.
17/980,693
Granted
Sep 12, 2023
Kind
B2
Abstract

To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10 −13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.

Claims (68)

1. A semiconductor device comprising:

a pixel portion comprising a first transistor; and

a driver circuit comprising a second transistor, the driver circuit being electrically connected to the pixel portion,

the first transistor comprising:

a first oxide semiconductor layer;

a first gate electrode layer;

a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode layer; and

a first source electrode layer and a first drain electrode layer which are in contact with the first oxide semiconductor layer,

the second transistor comprising:

a second gate electrode layer;

a second oxide semiconductor layer over the second gate electrode layer;

a second gate insulating layer between the second oxide semiconductor layer and the second gate electrode layer;

a third gate electrode layer;

a third gate insulating layer between the second oxide semiconductor layer and the third gate insulating layer; and

a second source electrode layer and a second drain electrode layer which are in contact with the second oxide semiconductor layer,

wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In, Ga, and Zn.

2. The semiconductor device according to claim 1 ,

wherein the first gate electrode layer has a laminated structure and comprises an element selected from molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, and scandium.

3. The semiconductor device according to claim 1 ,

wherein the third gate electrode layer has a laminated structure and comprises an element selected from molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, and scandium.

4. The semiconductor device according to claim 1 ,

wherein each of the first source electrode layer, the first drain electrode layer, the second source electrode layer, and the second drain electrode layer comprises an element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, neodymium and scandium.

5. A semiconductor device comprising:

a pixel portion comprising a first transistor; and

a driver circuit comprising a second transistor, the driver circuit being electrically connected to the pixel portion,

the first transistor comprising:

a first oxide semiconductor layer;

a first gate electrode layer over the first oxide semiconductor layer;

a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode layer; and

a first source electrode layer and a first drain electrode layer which are under the first oxide semiconductor layer and are in contact with the first oxide semiconductor layer,

the second transistor comprising:

a second gate electrode layer;

a second oxide semiconductor layer over the second gate electrode layer;

a second gate insulating layer between the second oxide semiconductor layer and the second gate electrode layer;

a third gate electrode layer;

a third gate insulating layer between the second oxide semiconductor layer and the third gate insulating layer; and

a second source electrode layer and a second drain electrode layer which are in contact with the second oxide semiconductor layer,

wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In, Ga, and Zn.

6. The semiconductor device according to claim 5 ,

wherein the first gate electrode layer has a laminated structure and comprises an element selected from molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, and scandium.

7. The semiconductor device according to claim 5 ,

wherein the third gate electrode layer has a laminated structure and comprises an element selected from molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, and scandium.

8. The semiconductor device according to claim 5 ,

wherein each of the first source electrode layer, the first drain electrode layer, the second source electrode layer, and the second drain electrode layer comprises an element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, neodymium and scandium.

9. A semiconductor device comprising:

a pixel portion comprising a first transistor; and

a driver circuit comprising a second transistor, the driver circuit being electrically connected to the pixel portion,

the first transistor comprising:

a first oxide semiconductor layer;

a first gate electrode layer over the first oxide semiconductor layer;

a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode layer; and

a first source electrode layer and a first drain electrode layer which are in contact with the first oxide semiconductor layer,

the second transistor comprising:

a second gate electrode layer;

a second oxide semiconductor layer over the second gate electrode layer;

a second gate insulating layer between the second oxide semiconductor layer and the second gate electrode layer;

a third gate electrode layer;

a third gate insulating layer between the second oxide semiconductor layer and the third gate insulating layer; and

a second source electrode layer and a second drain electrode layer which are under the second oxide semiconductor layer and are in contact with the second oxide semiconductor layer,

wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In, Ga, and Zn.

10. The semiconductor device according to claim 9 ,

wherein the first gate electrode layer is over the first oxide semiconductor layer.

11. The semiconductor device according to claim 9 ,

wherein the first gate electrode layer has a laminated structure and comprises an element selected from molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, and scandium.

12. The semiconductor device according to claim 9 ,

wherein the third gate electrode layer has a laminated structure and comprises an element selected from molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, and scandium.

13. The semiconductor device according to claim 9 ,

wherein each of the first source electrode layer, the first drain electrode layer, the second source electrode layer, and the second drain electrode layer comprises an element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, neodymium and scandium.

Priority Claims (1)
JP 2009-238918 · Oct 16, 2009 · national
Continuity (8)
Continuation 17340165 · Jun 7, 2021
Continuation 16816806 · Mar 12, 2020
Continuation 16008437 · Jun 14, 2018
Continuation 15469888 · Mar 27, 2017
Continuation 15332323 · Oct 24, 2016
Continuation 14570553 · Dec 15, 2014
Continuation 12902670 · Oct 12, 2010
Related Publication 20230064813A1 · Mar 2, 2023
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