IP Library Granted Patent US 11,978,741
Granted Patent B2
US 11,978,741 · App. 18/129,975 · Granted May 7, 2024

Display device including transistor and manufacturing method thereof

Inventors: Junichiro Sakata (Atsugi, JP); Toshinari Sasaki (Atsugi, JP); Miyuki Hosoba (Isehara, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1225H01L21/02554H01L21/02565H01L21/02631H01L27/1218H01L27/124H01L27/127H01L29/24H01L29/66969H01L29/78633H01L29/78645H01L29/78648H01L29/78654H01L29/7869H01L29/78696
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Quick Facts
Patent No.
US 11,978,741
App. No.
18/129,975
Granted
May 7, 2024
Kind
B2
Abstract

An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

Claims (54)

1. A semiconductor device comprising:

a first transistor comprising:

a first conductive layer over a substrate;

an insulating layer over the first conductive layer;

a first channel formation region over the insulating layer, the first channel formation region overlapping with the first conductive layer;

a second conductive layer overlapping with the first channel formation region;

a third conductive layer electrically connected to one of a source and a drain of the first transistor; and

a fourth conductive layer electrically connected to the other of the source and the drain of the first transistor; and

a second transistor comprising:

a fifth conductive layer over the substrate;

the insulating layer over the fifth conductive layer;

a second channel formation region over the insulating layer, the second channel formation region overlapping with the fifth conductive layer;

a sixth conductive layer overlapping with the second channel formation region;

the third conductive layer electrically connected to one of a source and a drain of the second transistor; and

a seventh conductive layer electrically connected to the other of the source and the drain of the second transistor,

wherein each of the first channel formation region and the second channel formation region comprises indium, gallium, and zinc,

wherein the third conductive layer comprises a region provided in an opening of the insulating layer,

wherein the fourth conductive layer and the seventh conductive layer are in contact with the insulating layer,

wherein the first conductive layer, the second conductive layer, and the third conductive layer overlap with each other, and

wherein the third conductive layer overlaps with the fifth conductive layer.

2. The semiconductor device according to claim 1 , wherein the insulating layer comprises silicon oxide and silicon nitride.

3. The semiconductor device according to claim 1 , wherein the second conductive layer is larger than the third conductive layer in a channel width direction of the first transistor.

4. The semiconductor device according to claim 1 , wherein the fifth conductive layer is larger than the third conductive layer in a channel width direction of the second transistor.

5. The semiconductor device according to claim 1 , wherein each of the first channel formation region and the second channel formation region comprises a crystal region.

6. The semiconductor device according to claim 1 , further comprising a resin layer over the first transistor and the second transistor.

7. The semiconductor device according to claim 1 , further comprising a layer comprising silicon nitride over the second conductive layer and the sixth conductive layer.

8. A semiconductor device comprising:

a first transistor comprising:

a first conductive layer over a substrate;

a first insulating layer over the first conductive layer;

a first channel formation region over the first insulating layer, the first channel formation region overlapping with the first conductive layer;

a second insulating layer over the first channel formation region;

a second conductive layer over the second insulating layer, the second conductive layer overlapping with the first channel formation region;

a third conductive layer electrically connected to one of a source and a drain of the first transistor; and

a fourth conductive layer electrically connected to the other of the source and the drain of the first transistor; and

a second transistor comprising:

a fifth conductive layer over the substrate;

the first insulating layer over the fifth conductive layer;

a second channel formation region over the first insulating layer, the second channel formation region overlapping with the fifth conductive layer;

the second insulating layer over the second channel formation region;

a sixth conductive layer over the second insulating layer, the sixth conductive layer overlapping with the second channel formation region;

the third conductive layer electrically connected to one of a source and a drain of the second transistor; and

a seventh conductive layer electrically connected to the other of the source and the drain of the second transistor,

wherein each of the first channel formation region and the second channel formation region comprises indium, gallium, and zinc,

wherein the third conductive layer comprises a region provided in an opening of the first insulating layer,

wherein the fourth conductive layer and the seventh conductive layer are in contact with the first insulating layer,

wherein the first conductive layer, the second conductive layer, and the third conductive layer overlap with each other, and

wherein the third conductive layer overlaps with the fifth conductive layer.

9. The semiconductor device according to claim 8 , wherein the first insulating layer comprises silicon oxide and silicon nitride.

10. The semiconductor device according to claim 8 , wherein the second conductive layer is larger than the third conductive layer in a channel width direction of the first transistor.

11. The semiconductor device according to claim 8 , wherein the fifth conductive layer is larger than the third conductive layer in a channel width direction of the second transistor.

12. The semiconductor device according to claim 8 , wherein each of the first channel formation region and the second channel formation region comprises a crystal region.

13. The semiconductor device according to claim 8 , further comprising a resin layer over the first transistor and the second transistor.

14. The semiconductor device according to claim 8 , further comprising a layer comprising silicon nitride over the second conductive layer and the sixth conductive layer.

Priority Claims (1)
JP 2009-159052 · Jul 3, 2009 · national
Continuity (10)
Continuation 17573792 · Jan 12, 2022
Continuation 16923395 · Jul 8, 2020
Continuation 16270079 · Feb 7, 2019
Continuation 15827318 · Nov 30, 2017
Continuation 15096663 · Apr 12, 2016
Continuation 14804508 · Jul 21, 2015
Continuation 14228663 · Mar 28, 2014
Continuation 13632709 · Oct 1, 2012
Continuation 12828464 · Jul 1, 2010
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