IP Library Granted Patent US 12,095,006
Granted Patent B2
US 12,095,006 · App. 17/664,569 · Granted Sep 17, 2024

Epitaxial oxide device with impact ionization

Inventor: Petar Atanackovic (Henley Beach South, AU)
Assignee: Silanna UV Technologies Pte Ltd
H01L33/26H01L21/02178H01L21/02192H01L21/02194H01L21/0228H01L21/02458H01L21/02507H01L23/66H01L27/15H01L29/151H01L29/2003H01L29/24H01L29/267H01L29/517H01L29/66462H01L29/7869H01L33/002H01L33/007H01L33/06H01L33/16H01L33/18H01L33/62H01S5/34H01L29/778H01L29/7786H01L2223/6627
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Quick Facts
Patent No.
US 12,095,006
App. No.
17/664,569
Granted
Sep 17, 2024
Kind
B2
Abstract

The present disclosure describes epitaxial oxide devices with impact ionization. In some embodiments, a semiconductor device comprises: a first semiconductor layer; a second semiconductor layer coupled to the first semiconductor layer; and a first and a second electrical contact coupled to the second and first semiconductor layers, respectively. The first semiconductor layer can comprise a first epitaxial oxide material with a first bandgap and an impact ionization region. The second semiconductor layer can comprise a second epitaxial oxide material with a second bandgap that is wider than the first bandgap.

Claims (43)

1. A semiconductor device, comprising:

a first semiconductor layer comprising:

a first epitaxial oxide material that is not intentionally doped (NID), the first epitaxial oxide material comprising a first bandgap; and

an impact ionization region;

a second semiconductor layer coupled to a first side of the first semiconductor layer, the second semiconductor layer comprising a second epitaxial oxide material, the second epitaxial oxide material comprising a second bandgap that is wider than the first bandgap;

a third semiconductor layer coupled to a second side of the first semiconductor layer, the third semiconductor layer comprising a third epitaxial oxide material that is n-type, the third epitaxial oxide material comprising a third bandgap that is wider than the first bandgap;

a first electrical contact coupled to the second semiconductor layer; and

a second electrical contact coupled to the third semiconductor layer;

wherein the third semiconductor layer is located between the first semiconductor layer and the second electrical contact.

2. The semiconductor device of claim 1 , wherein the semiconductor device is configured to:

inject a hot electron from the first electrical contact, through the second semiconductor layer, and into the first semiconductor layer; and

form, from the hot electron, an excess electron-hole pair in the impact ionization region via impact ionization.

3. The semiconductor device of claim 1 , wherein the semiconductor device is configured to:

inject a hot electron from the first electrical contact, through the second semiconductor layer, and into the first semiconductor layer; and

form, from the hot electron, two electrons in the impact ionization region via impact ionization.

4. The semiconductor device of claim 1 , wherein the first bandgap is equal to or greater than 5 eV.

5. The semiconductor device of claim 1 , wherein the second epitaxial oxide material is p-type.

6. The semiconductor device of claim 1 , wherein the first and/or second electrical contact comprises a high work function metal.

7. The semiconductor device of claim 1 , wherein the first and/or second electrical contact comprises Ni, Os, Se, Pt, Pd, Ir, Au, W or alloys thereof.

8. The semiconductor device of claim 1 , wherein the first and/or second electrical contact comprises C, Co, Be, Rh, Te, Ge, Fe or Si.

9. The semiconductor device of claim 1 , wherein the first and/or second electrical contact comprises a low work function metal.

10. The semiconductor device of claim 1 , wherein the first and/or second electrical contact comprises Ba, Na, Cs, Nd or alloys thereof.

11. The semiconductor device of claim 1 , wherein the first and/or second electrical contact comprises Rb, K, Eu, Sr, Pr, Yb, Sm, Dy, Ca, Pm, Ce, or Li.

12. The semiconductor device of claim 1 , wherein the first semiconductor layer comprises a breakdown voltage per unit thickness from 1 MV/cm to 10 MV/cm.

13. The semiconductor device of claim 1 , wherein the semiconductor device comprises a breakdown voltage from 100 V to 10,000 V at specific ON resistances from 10 −4 to 1 mΩ-cm 2 .

14. The semiconductor device of claim 1 , wherein the semiconductor device is configured to withstand a bias greater than 100 V applied across the first and the second electrical contacts without breaking down.

15. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises (Al x Ga 1−x ) 2 O 3 , with 0≤x≤1.

16. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises Ga 2 O 3 with an orthorhombic, hexagonal, monoclinic, cubic, tetragonal, rhombic or trigonal crystal symmetry.

17. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises Ga 2 O 3 , and the second epitaxial oxide material comprises Al 2 O 3 .

18. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises a material listed in the tables in FIGS. 76 A- 1 and 76 A- 2 , and the second epitaxial oxide material comprises a material listed in the tables in FIGS. 76 A- 1 and 76 A- 2 .

19. The semiconductor device of claim 18 , wherein the first bandgap is equal to or greater than 5 eV.

20. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises Li.

21. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises Ni.

22. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises:

Mg;

Ga or Al; and

O.

23. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises Ge.

24. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises a rare earth element.

25. The semiconductor device of claim 1 , wherein the first epitaxial oxide material comprises a gradient in composition.

26. The semiconductor device of claim 1 , wherein the second semiconductor layer comprises a tunnel barrier between the first electrical contact and the first semiconductor layer.

27. The semiconductor device of claim 1 , wherein the semiconductor device is a light emission device, and wherein the impact ionization region comprises an optical gain medium.

28. The semiconductor device of claim 1 , wherein the semiconductor device is an avalanche photodiode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2022
From: ATANACKOVIC, PETAR
To: SILANNA SEMICONDUCTOR PTY LTD
Reel/Frame 060057/0310 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2022
From: SILANNA SEMICONDUCTOR PTY LTD
To: SILANNA UV TECHNOLOGIES PTE LTD
Reel/Frame 060057/0312 →
Continuity (6)
Continuation 17652019 · Feb 22, 2022
Continuation PCTIB2021060466 · Nov 11, 2021
Continuation In Part PCTIB2021060413 · Nov 10, 2021
Continuation In Part PCTIB2021060414 · Nov 10, 2021
Continuation In Part PCTIB2021060427 · Nov 10, 2021
Related Publication 20230142940A1 · May 11, 2023
Cited By (11)
US 12,206,048 US 12,266,697 US 12,278,309 US 12,291,773 US 12,324,276 US 12,446,367 US 12,464,863 US 12,501,747 US 12,588,321 US 12,635,296 US 12,635,297