Techniques for fabricating charge balanced (CB) trench-metal-oxide-semiconductor field-effect transistor (MOSFET) devices
A charge balanced (CB) trench-metal-oxide-semiconductor field-effect transistor (MOSFET) device may include a charge balanced (CB) layer defined within a first epitaxial (epi) layer that has a first conductivity type. The CB layer may include charge balanced (CB) regions that has a second conductivity type. The CB trench-MOSFET device may include a device layer defined in a second epi layer and having the first conductivity type, where the device layer is disposed on the CB layer. The device layer may include a source region, a base region, a trench feature, and a shield region having the second conductivity type disposed at a bottom surface of the trench feature. The device layer may also include a charge balanced (CB) bus region having the second conductivity type that extends between and electrically couples the CB regions of the CB layer to at least one region of the device layer having the second conductivity type.
1. A method of manufacturing a charge balanced (CB) trench-metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:
forming a charge balanced (CB) layer from a first epitaxial (epi) layer having a first conductivity type by implanting a plurality of charge balanced (CB) regions within the first epi layer, wherein each CB region of the plurality of CB regions has a second conductivity type and is electrically isolated from other CB regions of the plurality of CB regions;
forming a device layer from a second epi layer and having the first conductivity type disposed on the CB layer, wherein the device layer comprises:
a source region having the first conductivity type disposed at an upper surface of the second epi layer;
a base region having the second conductivity type disposed below the source region;
a body region having the second conductivity type that extends from the upper surface of the second epi layer, through the source region, and into the base region;
a trench feature that extends from the upper surface of the second epi layer, through the source region and the base region, to a depth below the base region; and
a shield region having the second conductivity type at least partially disposed at a bottom surface of the trench feature;
disposing a source contact directly on the source region and the body region at the upper surface of the device layer;
and
performing an implantation to form a charge balanced (CB) bus region having the second conductivity type that extends between the plurality of CB regions of the CB layer and electrically couples the plurality of CB regions to the source contact via the base region and the body region.
2. The method of claim 1 , further comprises forming a CB bus region is formed in an active area of the CB MOSFET device.
3. The method of claim 2 , comprising forming the CB bus region within an overhead area associated with the CB MOSFET device.
4. The method of claim 2 ,
wherein the CB bus region electrically couples the plurality of CB regions to the body region.
5. The method of claim 2 , wherein the shield region is electrically coupled to the plurality of CB regions and to the body region of the CB MOSFET device by the CB bus region.
6. The method of claim 2 , wherein the CB bus region electrically couples the plurality of CB regions to a common potential of the CB MOSFET device.
7. The method of claim 1 , wherein the first conductivity type is created from p-type dopants.
8. The method of claim 1 , further comprising:
forming an oxide that extends into the second epi layer, wherein the oxide electrically isolates the device layer from a gate of the CB MOSFET device that is disposed entirely within the second epi layer.
9. The method of claim 8 , wherein the gate is disposed entirely within the device layer.
10. The method of claim 8 , wherein the oxide is formed between the shield region and the upper surface of the second epi layer.
11. The method of claim 1 , wherein the base region is a first base region, and wherein the method further comprises forming a second base region between the first base region and the first epi layer.
12. The method of claim 11 , wherein the depth of the trench feature extends below the second base region.
13. The method of claim 1 , further comprising forming an additional trench feature.
14. The method of claim 1 , wherein the shield region is only partially disposed under the trench feature.
15. The method of claim 1 , wherein the base region is completely disposed below the source region.
16. The method of claim 1 , wherein the body region extends below the base region within the second epi layer.
17. The method of claim 1 , wherein the plurality of CB regions are electrically coupled to the body region, the base region, and the shield region.
18. The method of claim 1 , wherein the shield region and the base region are electrically separated by a portion of the second epi layer.
19. The method of claim 1 , wherein the source region has a higher dopant concentration than a remainder of the second epi layer.
20. The method of claim 1 , wherein the second conductivity type is created from p-type dopants.