Granted Patent B2

US 12,207,566 · App. 18/359,943 · Granted Jan 21, 2025

Inventors: Jesmin Haq (Milpitas, CA); Tom Zhong (Saratoga, CA); Vinh Lam (Dublin, CA); Vignesh Sundar (Sunnyvale, CA); Zhongjian Teng (Santa Clara, CA)

Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

H10N50/80G11B5/3909G11B5/4826G11B5/6082G11B19/2009H10N50/01

Abstract

Claims (52)

1. A method, comprising:

forming a stress modulating layer on a first electrode layer, wherein a material of the stress modulating layer is different from a material of the first electrode layer;

forming a magnetic tunneling junction (MTJ) material stack on the stress modulating layer, and the forming of the MTJ material stack includes:

forming a seed layer on the stress modulating layer,

forming a pinned layer on the seed layer,

forming a barrier layer on the pinned layer

forming a free layer on the barrier layer, and

forming a capping layer on the free layer;

forming a second electrode layer on the MTJ material stack, wherein a material of the second electrode layer is different from the material of the stress modulating layer; and

annealing the stress modulating layer, the MTJ material stack, the first electrode layer, and the second electrode layer.

2. The method of claim 1 , wherein the stress modulating layer includes Zr, Hf, Al, or Mg.

3. The method of claim 1 , wherein the stress modulating layer is about 10 nm in thickness.

4. The method of claim 1 , wherein the stress modulating layer is a soft layer having low modulus of elasticity, wherein an elastic modulus of the stress modulating layer is about 50 Gigapascals (GPa).

5. The method of claim 1 , wherein the barrier layer is a magnesium oxide tunnel barrier layer, and the free layer is a CoFe magnetic layer.

6. The method of claim 1 , wherein the annealing includes applying a high temperature to the MTJ material stack to crystallize magnetic materials in the MTJ material stack.

7. The method of claim 1 , wherein the first electrode layer is embedded within a dielectric layer, top surfaces of the first electrode layer and the dielectric layer being substantially coplanar.

8. The method of claim 1 , wherein the stress modulating layer is a first stress modulating layer, further comprising:

forming a second stress modulating layer directly between the MTJ material stack and the second electrode layer, the second stress modulating layer having an elastic modulus between about 20 Gigapascals (GPa) and 400 GPa.

9. A method, comprising:

forming a magnetic tunneling junction (MTJ) material stack on a first electrode layer, and the forming of the MTJ material stack includes:

forming a seed layer on the first electrode layer,

forming a pinned layer on the seed layer,

forming a barrier layer on the pinned layer

forming a free layer on the barrier layer, and

forming a capping layer on the free layer;

forming a stress modulating layer on the MTJ material stack, wherein a material of the stress modulating layer is different from a material of the first electrode layer;

forming a second electrode layer on the stress modulating layer, wherein the material of the stress modulating layer is different from a material of the second electrode layer; and

annealing the stress modulating layer, the MTJ material stack, the first electrode layer, and the second electrode layer.

10. The method of claim 9 , wherein the stress modulating layer includes Zr, Hf, Al, or Mg.

11. The method of claim 9 , wherein the stress modulating layer is about 10 nm in thickness.

12. The method of claim 9 , wherein the stress modulating layer is a soft layer having low modulus of elasticity, wherein an elastic modulus of the stress modulating layer is about 50 Gigapascals (GPa).

13. The method of claim 9 , wherein the barrier layer is a magnesium oxide tunnel barrier layer, and the free layer is a CoFe magnetic layer.

14. The method of claim 9 , wherein the annealing includes applying a high temperature to the MTJ material stack to crystallize magnetic materials in the MTJ material stack.

15. The method of claim 9 , wherein the first electrode layer is embedded within a dielectric layer, top surfaces of the first electrode layer and the dielectric layer being substantially coplanar.

16. The method of claim 9 , wherein the stress modulating layer is a first stress modulating layer, further comprising:

forming a second stress modulating layer directly between the first electrode layer and the MTJ material stack, the second stress modulating layer having an elastic modulus between about 20 Gigapascals (GPa) and 400 GPa.

17. A method, comprising:

forming a first electrode layer in a dielectric layer;

forming a first stress modulating layer over the first electrode layer;

forming a MTJ material stack over the first stress modulating layer;

forming a second stress modulating layer over the MTJ material stack;

forming a second electrode layer over the MTJ material stack; and

annealing the first electrode layer, the first stress modulating layer, the MTJ material stack, the second stress modulating layer, and the second electrode layer,

wherein the first electrode layer and the second electrode layer includes a first material, the first stress modulating layer and the second stress modulating layer includes a second material, and the first material is different from the second material.

18. The method of claim 17 , wherein the forming of the MTJ material stack includes:

forming a seed layer over the first stress modulating layer;

forming a pinned layer over the seed layer;

forming a barrier layer over the pinned layer;

forming a free layer over the barrier layer; and

forming a capping layer over the free layer.

19. The method of claim 17 , wherein the first stress modulating layer directly contacts the first electrode layer and the MTJ material stack.

20. The method of claim 17 , wherein the second stress modulating layer directly contacts the second electrode layer and the MTJ material stack.

Assignments (2)

Continuity (4)

References Cited (30)