IP Library Granted Patent US 12,336,259
Granted Patent B2
US 12,336,259 · App. 17/545,373 · Granted Jun 17, 2025

Electronic device including two-dimensional material and method of fabricating the same

Inventors: Minseok Yoo (Suwon-si, KR); Minsu Seol (Seoul, KR); Junyoung Kwon (Seoul, KR); Kyung-Eun Byun (Seongnam-si, KR); Hyeonjin Shin (Suwon-si, KR); Van Luan Nguyen (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H10D64/513H10D30/6735H10D64/60
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Quick Facts
Patent No.
US 12,336,259
App. No.
17/545,373
Granted
Jun 17, 2025
Kind
B2
Abstract

Disclosed are an electronic device including a two-dimensional material, and a method of fabricating the electronic device. The electronic device may include a first metal layer including a transition metal, a second metal layer on the first metal layer and including gold (Au), and a two-dimensional material layer between the first metal layer and the second metal layer. The two-dimensional material layer may include a transition metal dichalcogenide (TMD). The two-dimensional material layer may be formed as a chalcogen element diffuses into the second metal layer and reacts with the transition metal of the first metal layer adjacent to the second metal layer.

Claims (86)

1. An electronic device comprising:

a first metal layer including a transition metal;

a second metal layer on the first metal layer and including gold (Au); and

a two-dimensional material layer between the first metal layer and the second metal layer and including a transition metal dichalcogenide (TMD) containing the transition metal of the first metal layer, wherein

the first metal layer and the second metal layer are different materials,

a width of the first metal layer in a first direction is greater than a width of the second metal layer in the first direction,

the first metal layer extends in the first direction,

the second metal layer extends in a second direction,

the second direction crosses the first direction, and

the first direction and the second direction intersect a thickness direction of the first metal layer and a thickness direction of the second metal layer.

2. The electronic device of claim 1 , further comprising:

a barrier layer on the first metal layer,

wherein the barrier layer defines an opening over a region of the first metal layer, the two-dimensional material layer is in the opening of the barrier layer, a part of the second metal layer is in the opening of the barrier layer and covers the two-dimensional material layer, and the barrier layer is configured to prevent diffusion of a chalcogen element.

3. The electronic device of claim 1 ,

wherein the two-dimensional material layer is formed as a chalcogen element diffuses into the second metal layer and reacts with the transition metal of the first metal layer, adjacent to the second metal layer.

4. The electronic device of claim 3 ,

wherein the transition metal comprises at least one selected from the group consisting of Mo, W, Nb, V, Ta, Ti, Zr, Hf, Co, Tc, and Re.

5. The electronic device of claim 3 ,

wherein the chalcogen element comprises at least one selected from the group consisting of S, Se, and Te.

6. The electronic device of claim 1 , further comprising:

a barrier layer provided around the second metal layer and the two-dimensional material layer, wherein

the barrier layer is configured to prevent diffusion of a chalcogen element.

7. The electronic device of claim 6 ,

wherein the barrier layer comprises silicon oxide, aluminum oxide, hafnium oxide, or quartz.

8. The electronic device of claim 1 ,

wherein the two-dimensional material layer comprises a single-material layer or the two-dimensional material layer comprises a composite-material layer comprising different two-dimensional materials.

9. The electronic device of claim 1 , further comprising:

a substrate, wherein

the first metal layer and the second metal layer are on the substrate with the two-dimensional material layer therebetween, and

the two-dimensional material layer is parallel to the substrate and connects the first metal layer and the second metal layer to each other.

10. The electronic device of claim 1 , wherein

the transition metal comprises at least one selected from the group consisting of Mo, W, Nb, V, Ta, Ti, Zr, Hf, Co, Tc, and Re, and

the two-dimensional material layer comprises at least one chalcogen element selected from the group consisting of S, Se, and Te.

11. An electronic device comprising:

a first metal layer including a transition metal;

a second metal layer on the first metal layer and including gold (Au); and

a two-dimensional material layer between the first metal layer and the second metal layer and including a transition metal dichalcogenide (TMD) containing the transition metal of the first metal layer, wherein

the first metal layer and the second metal layer are different materials,

the first metal layer extends lengthwise in a first direction,

the second metal layer extends lengthwise in a second direction,

the first metal layer and the second metal layer are spaced apart from each other in a third direction with the two-dimensional material layer therebetween,

the first direction, the second direction, and the third direction cross each other, and

the third direction corresponds to a thickness of the two-dimensional material layer.

12. The electronic device of claim 11 , further comprising:

a barrier layer provided around the second metal layer and the two-dimensional material layer, wherein

the barrier layer is configured to prevent diffusion of a chalcogen element.

13. A method of fabricating an electronic device, the method comprising:

forming a first metal layer comprising a transition metal on a substrate;

forming a second metal layer comprising gold (Au) on the first metal layer;

diffusing a chalcogen element into the second metal layer; and

forming a two-dimensional material layer comprising a transition metal dichalcogenide (TMD) by reacting the chalcogen element with the transition metal of the first metal layer adjacent to the second metal layer.

14. The method of claim 13 , further comprising:

forming a patterned barrier layer on the first metal layer.

15. The method of claim 14 ,

wherein the second metal layer is formed to cover the patterned barrier layer and a portion of the first metal layer is exposed by the patterned barrier layer through an opening in the patterned barrier layer.

16. The method of claim 13 ,

wherein the transition metal comprises at least one selected from the group consisting of Mo, W, Nb, V, Ta, Ti, Zr, Hf, Co, Tc, and Re, and

the chalcogen element comprises at least one selected from the group consisting of S, Se, and Te.

17. The method of claim 13 , wherein

the substrate includes a trench, and

the forming the first metal layer includes forming the first metal layer comprising the transition metal on an inner wall of the trench.

18. The method of claim 17 ,

wherein the first metal layer is deposited on the inner wall of the trench by atomic layer deposition (ALD), and

the first metal layer has a uniform thickness.

19. The method of claim 17 ,

wherein the transition metal comprises at least one selected from the group consisting of Mo, W, Nb, V, Ta, Ti, Zr, Hf, Co, Tc, and Re, and

the chalcogen element comprises at least one selected from the group consisting of S, Se, and Te.

20. The method of claim 13 ,

wherein the forming the two-dimensional material layer includes suppling the chalcogen element to an upper portion of the second metal layer and diffusing the chalcogen element through the second metal layer during a heat treatment process.

21. The method of claim 20 , wherein,

during the forming the two-dimensional material layer, the chalcogen element is supplied to the upper portion of the second metal layer by providing a chalcogen precursor containing the chalcogen element to the upper portion of the second metal layer.

22. The method of claim 20 , wherein,

during the forming the two-dimensional material layer, the heat treatment process is performed at a process temperature of about 500° C. to about 1000° C.

23. A semiconductor structure comprising:

the electronic device formed by the method of claim 13 .

24. The method of claim 13 , wherein

the two-dimensional material layer contains the transition metal of the first metal layer,

the first metal layer and the second metal layer are different materials,

a width of the first metal layer in a first direction is greater than a width of the second metal layer in the first direction,

the first metal layer extends in the first direction,

the second metal layer extends in a second direction,

the second direction crosses the first direction, and

the first direction and the second direction intersect a thickness direction of the first metal layer and a thickness direction of the second metal layer.

25. The electronic device of claim 11 , wherein

the transition metal comprises at least one selected from the group consisting of Mo, W, Nb, V, Ta, Ti, Zr, Hf, Co, Tc, and Re, and

the two-dimensional material layer comprises at least one chalcogen element selected from the group consisting of S, Se, and Te.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2021
From: YOO, MINSEOK; SEOL, MINSU; KWON, JUNYOUNG; BYUN, KYUNG-EUN; SHIN, HYEONJIN; NGUYEN, VAN LUAN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 058478/0857 →
Priority Claims (1)
KR 10-2021-0081032 · Jun 22, 2021 · national
Continuity (1)
Related Publication 20220406911A1 · Dec 22, 2022
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