Granted Patent
B2
US 12,341,137 · App. 16/804,986 · Granted Jun 24, 2025
Illumination devices using externally interconnected arrays of light emitting devices, and methods of fabricating same
Assignee:
CreeLED, Inc.
H01L25/0756H05B45/30H05B45/37H10H20/811H10H20/825H10H20/831H10H20/8312H10H29/142H01L21/2654H01L2924/0002H05B45/38H10H20/8314H10H20/84H10H20/857H10H29/14
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Abstract
A light emitter, comprising light emitting devices mechanically interconnected by a common substrate and an interconnection submount. The light emitting devices are electrically interconnected by the submount to provide an array of serially connected subsets of light emitting devices, each subset comprising at least three light emitting devices electrically connected in parallel. Also, a light emitter comprising first light emitting devices mechanically interconnected by a first common substrate, and second light emitting devices mechanically interconnected by a second common substrate, the first light emitting devices being mechanically and electrically connected to the second light emitting devices. Also, a light emitter comprising mechanically interconnected light emitting devices and means for mechanically and electrically interconnecting the plurality of light emitting devices to provide an array of serially connected subsets of light emitting devices, each subset comprising at least three light emitting devices electrically connected in parallel. Also, methods of fabricating light emitters.
Claims (21)
1. A multiple light emitting diode (LED) chip, comprising:
a plurality of light emitting devices including a first light emitting device and a second light emitting device, wherein each light emitting device of the plurality of light emitting devices comprises:
a substrate portion that is electrically conductive;
one or more buffer layers over the substrate portion;
at least a first n-type layer,
at least a first active layer; and
at least a first p-type layer;
wherein the multiple LED chip comprises at least one isolation region configured to electrically isolate the first light emitting device from the second light emitting device, wherein the at least one isolation region comprises a solid insulating material that extends through the one or more buffer layers and the substrate portions, the solid insulating material comprising at least one of an oxide or a nitride; and
wherein the multiple LED chip comprises at least one conductive via extending through the solid insulating material of the at least one isolation region.
2. The multiple LED chip of claim 1 , wherein substrate comprises silicon carbide.
3. The multiple LED chip of claim 1 , wherein the first light emitting device comprises a first light emitting device n-contact and a first light emitting device p-contact that are external to the first light emitting device, and the second light emitting device comprises a second light emitting device n-contact and a second light emitting device p-contact that are external to the second light emitting device.
4. The multiple LED chip of claim 3 , wherein the first light emitting device n-contact, the first light emitting device p-contact, the second light emitting device n-contact, and the second light emitting device p-contact are all arranged on a same side of the multiple LED chip.
5. The multiple LED chip of claim 3 , wherein the first light emitting device n-contact, the first light emitting device p-contact, the second light emitting device n-contact, and the second light emitting device p-contact are arranged to be flip-chip mounted to a support element.
6. The multiple LED chip of claim 5 , wherein a contact surface of the first light emitting device n-contact, a contact surface of the first light emitting device p-contact, a contact surface of the second light emitting device n-contact, and a contact surface of the second light emitting device p-contact are all substantially coplanar along a first plane.
7. A method for fabricating a multiple light emitting diode (LED) chip according to claim 1 , the method comprising:
providing the at least a first n-type layer, the at least a first active layer, the at least a first a p-type layer on the one or more buffer lavers arranged over a substrate;
forming the at least one isolation region, the at least one isolation region extending through the at least a first n-type layer, the at least a first active layer, the at least a first p-type layer, the one or more buffer layers, and at least partially into the substrate, the at least one isolation region defining the first light emitting device and the second light emitting device on the substrate and defining a boundary between the substrate portions;
forming the at least one conductive via through the solid insulating material of the at least one isolation region; and
forming separate anode and cathode connections for first light emitting device and the second light emitting device.
8. The method of claim 7 , wherein forming the at least one isolation region comprises ion implanting the at least a first n-type layer, the at least a first active layer, the at least a first p-type layer, the one or more buffer layers, and at least part of the substrate.
9. The method of claim 7 , wherein the at least one isolation region comprises a trench filled with the solid insulating material, and the solid insulating material comprises at least one of an oxide or a nitride.
Assignments (7)
PATENT SECURITY AGREEMENT
Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001
Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
SECURITY INTEREST
Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded Jul 29, 2021
From: CREE, INC.
To: CREELED, INC.
Reel/Frame 057017/0311 →
MERGER
Recorded Jul 28, 2021
From: CREE LED LIGHTING SOLUTIONS, INC.
To: CREE, INC.
Reel/Frame 056999/0473 →
MERGER
Recorded Jul 27, 2021
From: LED LIGHTING FIXTURES, INC.
To: CREE LED LIGHTING SOLUTIONS, INC.
Reel/Frame 056981/0941 →
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded Jul 21, 2021
From: NEGLEY, GERALD H.; VAN DE VEN, ANTONY PAUL
To: LED LIGHTING FIXTURES, INC.
Reel/Frame 056927/0421 →
Continuity (5)
Provisional Application
60986795
· Nov 9, 2007
Provisional Application
60982909
· Oct 26, 2007
Provisional Application
60885937
· Jan 22, 2007
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