Semiconductor packages and methods of manufacturing thereof
View Patent ↗A semiconductor package includes a first die comprising a voltage regulator that has a first input and a second input. The semiconductor package includes a second die coupled to the first die and comprising a first load circuit. The voltage regulator is configured to provide a regulated voltage to the first load circuit through a first through via structure based on a first voltage received through the first input and a second voltage received from the first load circuit through a second through via structure. The first voltage is a constant reference voltage, and the second voltage is a first signal sensed from the first load circuit.
1. A semiconductor package, comprising:
a first die comprising a voltage regulator that has a first input and a second input; and
a second die coupled to the first die and comprising a first load circuit;
wherein the voltage regulator is configured to provide a regulated voltage to the first load circuit through a first through via structure based on a first voltage received through the first input and a second voltage received from the first load circuit through a second through via structure; and
wherein the first voltage is a constant reference voltage, and the second voltage is a first signal sensed from the first load circuit.
2. The semiconductor package of claim 1 , wherein a current flowing through the second through via structure is substantially close to zero.
3. The semiconductor package of claim 1 , wherein the voltage regulator includes a differential amplifier has the first input and second input.
4. The semiconductor package of claim 1 , wherein the first through via structure and second through via structure each extend through a first substrate of the first die.
5. The semiconductor package of claim 1 , further comprising:
a package substrate; and
a redistribution structure;
wherein the first die is electrically coupled to the package substrate through the redistribution structure, and the second die is electrically coupled to the first die.
6. The semiconductor package of claim 5 , wherein the voltage regulator is configured to receive a supply voltage through the package substrate, and to provide the regulated voltage further through the package substrate and the redistribution structure.
7. The semiconductor package of claim 5 , wherein a frontside of a first substrate of the first die faces the package substrate with the redistribution structure interposed therebetween, and a backside of the first substrate faces a frontside of a second substrate of the second die.
8. The semiconductor package of claim 5 , wherein a backside of a first substrate of the first die faces the package substrate with the redistribution structure interposed therebetween, and a frontside of the first substrate faces a frontside of a second substrate of the second die.
9. The semiconductor package of claim 1 , wherein a first size of the first through via structure is substantially greater than a second size of the second through via structure.
10. The semiconductor package of claim 1 , wherein the second die further comprises a second load circuit; and wherein the voltage regulator is configured to provide the regulated voltage to each of the first load circuit and second load circuit based on the first voltage and the second voltage received from both of the first load circuit and second load circuit through the second through via structure.
11. The semiconductor package of claim 10 , wherein the second voltage is an averaged signal of the first signal and a second signal sensed from the second load circuit.
12. The semiconductor package of claim 10 , wherein the second die comprises:
a first interconnect path electrically coupling the first load circuit to the second through via structure; and
a second first interconnect path electrically coupling the second load circuit to the second through via structure;
wherein the first and second interconnect paths have substantially similar lengths.
13. A semiconductor package, comprising:
a first die comprising a voltage regulator that has a first input and a second input; and
a second die coupled to the first die and comprising a first load circuit;
wherein the voltage regulator is configured to provide a regulated voltage to the first load circuit through a first through via structure based on a first voltage received through the first input and a second voltage received from the first load circuit through a second through via structure;
wherein the first voltage is a constant reference voltage, and the second voltage is a first signal sensed from the first load circuit; and
wherein a current flowing through the second through via structure is substantially close to zero.
14. The semiconductor package of claim 13 , wherein the voltage regulator includes a differential amplifier has the first input and second input.
15. The semiconductor package of claim 13 , wherein the first through via structure and second through via structure each extend through a first substrate of the first die.
16. The semiconductor package of claim 13 , wherein a first size of the first through via structure is substantially greater than a second size of the second through via structure.
17. A semiconductor package, comprising:
a first die comprising a voltage regulator that has a first input and a second input;
a second die coupled to the first die and comprising a first load circuit;
a package substrate; and
a redistribution structure;
wherein the first die is electrically coupled to the package substrate through the redistribution structure, and the second die is electrically coupled to the first die;
wherein the voltage regulator is configured to provide a regulated voltage to the first load circuit through a first through via structure based on a first voltage received through the first input and a second voltage received from the first load circuit through a second through via structure;
wherein the first voltage is a constant reference voltage, and the second voltage is a first signal sensed from the first load circuit.
18. The semiconductor package of claim 17 , wherein the voltage regulator is configured to receive a supply voltage through the package substrate, and to provide the regulated voltage further through the package substrate and the redistribution structure.
19. The semiconductor package of claim 17 , wherein a frontside of a first substrate of the first die faces the package substrate with the redistribution structure interposed therebetween, and a backside of the first substrate faces a frontside of a second substrate of the second die.
20. The semiconductor package of claim 17 , wherein a backside of a first substrate of the first die faces the package substrate with the redistribution structure interposed therebetween, and a frontside of the first substrate faces a frontside of a second substrate of the second die.