IP Library › Granted Patent US 12,373,121
Granted Patent B2
US 12,373,121 · App. 18/353,857 · Granted Jul 29, 2025

Adaptive use of multiple channels in a storage device

Inventors: Shay Benisty (Beer Sheva, IL); Ariel Navon (Revava, IL); Alexander Bazarsky (Holon, IL); Judah Gamliel Hahn (Ofra, IL)
Assignee: Sandisk Technologies, Inc.
G06F3/0631G06F3/0604G06F3/0679
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Quick Facts
Patent No.
US 12,373,121
App. No.
18/353,857
Granted
Jul 29, 2025
Kind
B2
Abstract

More efficient memory device usage is possible by altering the memory device management. For example, when the full storage capacity of the memory device will not be used, certain portions of the memory device can be shut off and then turned on when the storage capacity is needed. When less capacity is needed, data can be consolidated and certain portions of the memory device can be shut off. Additionally, rather than operating in multilevel cell (MLC) memory, the memory device can start in single level cell (SLC) memory and transition to MLC memory over time. If there is a determination that less memory is needed, the memory device can transition from MLC memory to SLC memory. In so doing, the storage capacity of the memory device is more appropriately utilized.

Claims (33)

1. A data storage device, comprising:

a memory device; and

a controller coupled to the memory device, wherein the controller includes a plurality of channels, wherein each channel of the plurality of channels is coupled to at least one die of the memory device, wherein the controller is configured to:

configure an entirety of the memory device as single level cell (SLC) memory;

analyze a usage of the memory device, wherein the usage comprises a use percentage of a total capacity of the memory device during a predetermined period of time;

detect an increase in need for memory device capacity based on the analyzing, wherein the increase in need for memory device capacity is detected if the use percentage is greater than one-third;

open an additional number of channels of the plurality of channels;

determine whether the increase in need for memory device capacity occurs when the entirety of the memory device is configured as SLC memory; and

convert at least a portion of the SLC memory to multilevel cell (MLC) memory if the increase in need for memory device capacity occurs when the entirety of the memory device is configured as SLC memory.

2. The data storage device of claim 1 , wherein the controller includes a capacity control module configured to perform the detection.

3. The data storage device of claim 1 , wherein the controller is configured to rewrite a portion of data from SLC memory to MLC memory.

4. The data storage device of claim 1 , wherein the controller is configured to detect a decrease in need for memory device capacity.

5. The data storage device of claim 4 , wherein the controller is configured to convert the portion of MLC memory to SLC memory.

6. The data storage device of claim 5 , wherein the controller is configured to relocate data from MLC memory to SLC memory in response to the converting.

7. The data storage device of claim 1 , wherein the controller is configured to execute a rebalancing management operation after the converting and the opening, wherein the rebalancing management operation comprises rewriting data written to the memory device to at least one die coupled to any channel of the additional number of channels.

8. The data storage device of claim 7 , wherein the rebalancing management operation occurs as a background operation.

9. The data storage device of claim 1 , wherein the controller is configured to prioritize opening the additional number of channels over the converting.

10. A data storage device, comprising:

means to store data; and

a controller coupled to the means to store data, wherein the controller comprises a plurality of channels, wherein each channel of the plurality of channels is coupled to at least one die of the means to store data, and wherein the controller is configured to:

determine a past usage trend of the means to store data, wherein the past usage comprises a use percentage of a total capacity of the means to store data during a predetermined period of time;

detect an increase in need for capacity of the means to store data, wherein the increase in need for capacity of the means to store data is detected if the use percentage is greater than one-third;

open a number of channels of the plurality of channels;

convert single level cell (SLC) memory to multilevel cell (MLC) memory;

convert MLC memory to SLC memory; and

adaptively modify properties of the means to store data and the plurality of channels operating between the controller and the means to store data according to the past usage trend, wherein the adaptively modifying comprises:

determining whether the increase in need for capacity of the means to store data occurs when an entirety of the means to store data is configured as SLC memory;

changing a portion of the means to store data from SLC memory to MLC memory if the increase in need for capacity of the means to store data occurs when the entirety of the means to store data is configured as SLC memory;

changing a portion of the means to store data from MLC memory to SLC memory;

opening an additional channel of the plurality of channels; and

closing a channel of the plurality of channels.

11. The data storage device of claim 10 , wherein the adaptive modifying occurs as a background operation.

12. The data storage device of claim 10 , wherein the controller comprises a capacity control module configured to monitor means for data storage usage trends.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL Recorded Nov 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 065657/0158 →
PATENT COLLATERAL AGREEMENT- A&R Recorded Nov 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 065656/0649 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2023
From: BENISTY, SHAY; NAVON, ARIEL; BAZARSKY, ALEXANDER; HAHN, JUDAH GAMLIEL
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 064893/0922 →
Continuity (1)
Related Publication 20250028462A1 · Jan 23, 2025
References Cited (15)
US 8856425B2 · Shen · 2014 [cited by applicant]
US 20110047316A1 · Farhan et al. · 2011 [cited by applicant]
US 20120173827A1 · Wood · 2012 [cited by examiner]
US 20120221771A1 · Yoon et al. · 2012 [cited by applicant]
US 20130308392A1 · Nishijima · 2013 [cited by examiner]
US 20150301754A1 · Kochar · 2015 [cited by examiner]
US 20160019137A1 · Ellis · 2016 [cited by examiner]
US 20170090947A1 · Lee · 2017 [cited by examiner]
US 20180173619A1 · Sivasankaran · 2018 [cited by examiner]
US 20180276123A1 · Matsudaira · 2018 [cited by examiner]
US 20190065388A1 · Christensen · 2019 [cited by examiner]
US 20200183622A1 · Hubbard · 2020 [cited by applicant]
US 20220129168A1 · Tanpairoj et al. · 2022 [cited by applicant]
US 20220326877A1 · Byom et al. · 2022 [cited by applicant]
US 20230290419A1 · Yang · 2023 [cited by examiner]