IP Library Granted Patent US 12,376,345
Granted Patent B2
US 12,376,345 · App. 18/670,779 · Granted Jul 29, 2025

Semiconductor structure

Inventors: Meng-Hsuan Hsiao (Hsinchu, TW); Wei-Sheng Yun (Taipei, TW); Winnie Victoria Wei-Ning Chen (Zhubei, TW); Tung Ying Lee (Hsinchu, TW); Ling-Yen Yeh (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10D30/6757H10D30/031H10D30/6735H10D62/121H10D62/83H10D64/017H10D84/85
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Quick Facts
Patent No.
US 12,376,345
App. No.
18/670,779
Granted
Jul 29, 2025
Kind
B2
Abstract

A semiconductor structure is provided. The semiconductor structure includes a first nanowire over a semiconductor fin. The semiconductor structure also includes a second nanowire over the first nanowire and a third nanowire over the second nanowire. The semiconductor structure further includes a source/drain wrapping around the first nanowire, the second nanowire and the third nanowire. A thickness of a first portion of the source/drain vertically sandwiched between the first nanowire and the second nanowire is different from a thickness of a second portion of the source/drain vertically sandwiched between the second nanowire and the third nanowire.

Claims (40)

1. A semiconductor structure, comprising:

a first nanowire over a semiconductor fin;

a second nanowire over the first nanowire;

a third nanowire over the second nanowire; and

a source/drain wrapping around the first nanowire, the second nanowire and the third nanowire, wherein a thickness of a first portion of the source/drain vertically sandwiched between the first nanowire and the second nanowire is different from a thickness of a second portion of the source/drain vertically sandwiched between the second nanowire and the third nanowire.

2. The semiconductor structure of claim 1 , wherein the first portion of the source/drain is in direct contact with the first nanowire and the second nanowire.

3. The semiconductor structure of claim 2 , wherein the second portion of the source/drain is in direct contact with the second nanowire and the third nanowire.

4. The semiconductor structure of claim 1 , further comprising:

an isolation structure surrounding the semiconductor fin.

5. The semiconductor structure of claim 4 , wherein a top surface of the semiconductor fin is lower than a top surface of the isolation structure.

6. The semiconductor structure of claim 4 , wherein a top surface of the semiconductor fin is higher than a top surface of the isolation structure.

7. The semiconductor structure of claim 1 , wherein the thickness of the first portion of the source/drain is greater than the thickness of the second portion of the source/drain by a range of from about 0.5 nm to about 1.5 nm.

8. The semiconductor structure of claim 1 , further comprising:

a fourth nanowire over the third nanowire wrapped around by the source/drain, wherein the thickness of the second portion of the source/drain vertically sandwiched between the second nanowire and the third nanowire is different from a thickness of a third portion of the source/drain vertically sandwiched between the third nanowire and the fourth nanowire.

9. A semiconductor structure, comprising:

a first nanowire;

a second nanowire over the first nanowire;

a third nanowire over the second nanowire; and

a first gate wrapping around the first nanowire, the second nanowire and the third nanowire, wherein a thickness of a first portion of the first gate between the first nanowire and the second nanowire is different from a thickness of a second portion of the first gate between the second nanowire and the third nanowire.

10. The semiconductor structure of claim 9 , further comprising:

a first semiconductor fin below the first nanowire; and

an isolation structure surrounding the first semiconductor fin.

11. The semiconductor structure of claim 10 , wherein a top surface of the first semiconductor fin is lower than a top surface of the isolation structure.

12. The semiconductor structure of claim 10 , wherein a top surface of the first semiconductor fin is higher than a top surface of the isolation structure.

13. The semiconductor structure of claim 10 , further comprising:

a second semiconductor fin;

a fourth nanowire, a fifth nanowire and a sixth nanowire over the second semiconductor fin; and

a second gate wrapping around the fourth nanowire, the fifth nanowire and the sixth nanowire.

14. The semiconductor structure of claim 13 , wherein a top surface of the second gate is higher than a top surface of the first gate.

15. The semiconductor structure of claim 13 , wherein a top surface of the second semiconductor fin is higher than a top surface of the first semiconductor fin.

16. A semiconductor structure, comprising:

a semiconductor fin on a substrate;

a first channel structure most proximal to a top surface of the semiconductor fin;

a second channel structure second most proximal to the top surface of the semiconductor fin; and

a third channel structure third most proximal to the top surface of the semiconductor fin, wherein a first spacing between the first channel structure and the second channel structure is different from a second spacing between the second channel structure and the third channel structure.

17. The semiconductor structure of claim 16 , wherein thicknesses of the first channel structure, the second channel structure and the third channel structure are identical.

18. The semiconductor structure of claim 16 , further comprising:

an isolation structure surrounding the semiconductor fin.

19. The semiconductor structure of claim 18 , wherein the top surface of the semiconductor fin is lower than a top surface of the isolation structure.

20. The semiconductor structure of claim 18 , wherein a top surface of the first semiconductor fin is higher than the top surface of the isolation structure.

Continuity (4)
Continuation 18082320 · Dec 15, 2022
Continuation 17086988 · Nov 2, 2020
Division 16005631 · Jun 11, 2018
Related Publication 20240313126A1 · Sep 19, 2024
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