IP Library › Granted Patent US 12,376,371
Granted Patent B2
US 12,376,371 · App. 18/650,668 · Granted Jul 29, 2025

Fin Field-Effect Transistor device and method

Inventors: Shao-Jyun Wu (New Taipei, TW); Sheng-Liang Pan (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H10D84/038H01L21/28088H01L21/31138H01L21/32105H10D84/0177H10D84/0193H10D84/853
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Quick Facts
Patent No.
US 12,376,371
App. No.
18/650,668
Granted
Jul 29, 2025
Kind
B2
Abstract

A method of forming a semiconductor device includes forming a first dummy gate structure and a second dummy gate structure over a fin; forming a first dielectric layer around the first dummy gate structure and around the second dummy gate structure; removing the first dummy gate structure and the second dummy gate structure to form a first recess and a second recess in the first dielectric layer, respectively; forming a gate dielectric layer in the first recess and the second recess; forming a first work function layer over the gate dielectric layer in the first and the second recesses; removing the first work function layer from the first recess; converting a surface layer of the first work function layer in the second recess into an oxide; and forming a second work function layer in the first recess over the gate dielectric layer and in the second recess over the oxide.

Claims (45)

1. A method of forming a semiconductor device, the method comprising:

removing a first dummy gate structure and a second dummy gate structure, wherein the first dummy gate structure and the second dummy gate structure are over a fin and surrounded by a dielectric layer, wherein removing the first dummy gate structure and the second dummy gate structure forms a first recess and a second recess, respectively, in the dielectric layer;

forming a gate dielectric layer in the first recess and in the second recess;

forming a first work function layer over the gate dielectric layer in the first recess and in the second recess;

removing the first work function layer from the first recess;

forming a second work function layer in the first recess over the gate dielectric layer and in the second recess over the first work function layer, wherein the second work function layer is formed to have different thicknesses in the first recess and the second recess; and

forming a gate electrode material in the first recess and the second recess.

2. The method of claim 1 , further comprising, after removing the first work function layer from the first recess and before forming the second work function layer, converting an exterior layer of the first work function layer into an oxide.

3. The method of claim 2 , wherein the first work function layer is formed of a silicon containing material, and the oxide is silicon oxide.

4. The method of claim 1 , wherein the second work function layer is formed to have a first thickness in the first recess and have a second thickness in the second recess, wherein the second thickness is larger than the first thickness.

5. The method of claim 4 , wherein a same deposition process is used to form the second work function layer in the first recess and in the second recess at the same time.

6. The method of claim 1 , wherein removing the first work function layer from the first recess comprises:

forming a patterned mask layer over the first work function layer, wherein the patterned mask layer covers the first work function layer in the second recess and exposes the first work function layer in the first recess;

performing a first etching process to remove the exposed first work function layer from the first recess; and

after performing the first etching process, performing a second etching process to remove the patterned mask layer.

7. The method of claim 6 , wherein the patterned mask layer is formed of a material comprising oxygen, wherein the second etching process is a plasma process that generates oxygen species from the material of the patterned mask layer, wherein the oxygen species react with an exterior layer of the first work function layer to form an oxide of a material of the first work function layer.

8. The method of claim 7 , wherein a gas source of the plasma process is free of oxygen.

9. The method of claim 7 , wherein the first etching process is a wet etch process.

10. The method of claim 1 , wherein the first work function layer is formed of a p-type work function material, and the second work function layer is formed of an n-type work function material.

11. A method of forming a semiconductor device, the method comprising:

forming an interlayer dielectric layer (ILD) around a first dummy gate and a second dummy gate, wherein the first dummy gate and the second dummy gate are over a fin; and

replacing the first dummy gate and the second dummy gate with a first replacement gate and a second replacement gate, respectively, wherein the replacing comprises:

removing the first dummy gate and the second dummy gate to form a first recess and a second recess in the ILD, respectively;

forming a gate dielectric layer in the first recess and in the second recess;

forming a first work function layer in the second recess over the gate dielectric layer;

converting an exterior layer of the first work function layer to an oxide; and

after the converting, filling the first recess and the second recess with an electrically conductive material.

12. The method of claim 11 , wherein forming the first work function layer in the second recess comprises:

forming the first work function layer in the first recess and in the second recess;

forming a patterned mask layer over the first work function layer, wherein the patterned mask layer covers the first work function layer in the second recess and exposes the first work function layer in the first recess; and

removing the exposed first work function layer from the first recess.

13. The method of claim 12 , further comprising, after removing the exposed first work function layer from the first recess, performing a plasma process to remove the patterned mask layer.

14. The method of claim 13 , wherein the plasma process generates oxygen species from a material of the patterned mask layer, wherein the oxygen species react with the exterior layer of the first work function layer to form the oxide.

15. The method of claim 11 , further comprising, after converting the exterior layer of the first work function layer and before filling the first recess and the second recess, forming a second work function layer in the first recess and the second recess.

16. The method of claim 15 , wherein the second work function layer is formed to be thicker in the second recess than in the first recess.

17. A method of forming a semiconductor device, the method comprising:

forming a first dummy gate structure and a second dummy gate structure over a fin, the first dummy gate structure and the second dummy gate structure being surrounded by a dielectric layer;

removing the first dummy gate structure and the second dummy gate structure to form a first recess and a second recess in the dielectric layer, respectively;

forming a gate dielectric layer in the first recess and the second recess;

forming a first work function layer in the second recess over the gate dielectric layer;

after forming the first work function layer, forming a second work function layer in the first recess and the second recess, wherein the second work function layer in the first recess is formed to have a first thickness, and wherein the second work function layer in the second recess is formed to have a second thickness different from the first thickness; and

filling the first recess and the second recess with a gate material to form gate electrodes.

18. The method of claim 17 , further comprising, after forming the first work function layer and before forming the second work function layer, converting a surface layer of the first work function layer into an oxide of a material of the first work function layer.

19. The method of claim 17 , wherein the second thickness is larger than the first thickness.

20. The method of claim 17 , wherein forming the first work function layer comprises forming the first work function layer in the second recess but not in the first recess.

Continuity (5)
Continuation 18064432 · Dec 12, 2022
Continuation 17127325 · Dec 18, 2020
Division 16252282 · Jan 18, 2019
Provisional Application 62753682 · Oct 31, 2018
Related Publication 20240282641A1 · Aug 22, 2024
References Cited (24)
US 8729627B2 · Cheng et al. · 2014 [cited by applicant]
US 9281201B2 · Guo et al. · 2016 [cited by applicant]
US 9520482B1 · Chang et al. · 2016 [cited by applicant]
US 9899271B2 · Chang et al. · 2018 [cited by applicant]
US 9947540B2 · Tsai et al. · 2018 [cited by applicant]
US 10622482B2 · Greene et al. · 2020 [cited by applicant]
US 10784260B2 · Park et al. · 2020 [cited by applicant]
US 10872826B2 · Wu et al. · 2020 [cited by applicant]
US 20150206953A1 · Basker et al. · 2015 [cited by applicant]
US 20160027664A1 · Ando et al. · 2016 [cited by applicant]
US 20160225868A1 · Kim et al. · 2016 [cited by applicant]
US 20160343706A1 · Chang et al. · 2016 [cited by applicant]
US 20160351568A1 · Chang et al. · 2016 [cited by applicant]
US 20160351569A1 · Song et al. · 2016 [cited by applicant]
US 20170213826A1 · Kim et al. · 2017 [cited by applicant]
US 20180108745A1 · Li · 2018 [cited by applicant]
US 20180226289A1 · Bielefeld et al. · 2018 [cited by applicant]
US 20190006465A1 · Liao et al. · 2019 [cited by applicant]
US 20190148384A1 · Bae et al. · 2019 [cited by applicant]
KR 20160139814A · 2016 [cited by applicant]
KR 101785803B1 · 2017 [cited by applicant]
TW 201436047A · 2014 [cited by applicant]
TW 201642326A · 2016 [cited by applicant]
TW 201705238A · 2017 [cited by applicant]