IP Library › Granted Patent US 12,461,418
Granted Patent B2
US 12,461,418 · App. 17/993,268 · Granted Nov 4, 2025

Display device

Inventors: Kouhei Toyotaka (Kanagawa, JP); Koji Kusunoki (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G02F1/1368H10D86/423H10D86/60
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Quick Facts
Patent No.
US 12,461,418
App. No.
17/993,268
Granted
Nov 4, 2025
Kind
B2
Abstract

A highly visible display device is provided. The display device includes a transistor, a first conductive layer, a second conductive layer, and a third conductive layer. The channel width of the transistor is greater than or equal to 30 μm and less than or equal to 1000 μm The transistor includes 2 to 50 semiconductor layers, each of which includes a first region, a second region, and a channel formation region. The channel formation region has a region overlaps with the first conductive layer. The first region overlaps with the second conductive layer and does not overlap with the first conductive layer. The second region overlaps with the third conductive layer and does not overlap with the first conductive layer. The third conductive layer has a function of transmitting visible light, and the second region and the third conductive layer in a stacked state have a function of transmitting visible light.

Claims (53)

1 . A display device comprising a pixel, the pixel comprising:

a transistor comprising a semiconductor layer, a first insulating layer, and a third conductive layer; and

a capacitor comprising a first conductive layer, a second conductive layer under the first conductive layer, and a second insulating layer sandwiched between the first conductive layer and the second conductive layer,

wherein the first conductive layer is directly connected to the third conductive layer through a first opening portion formed in the second insulating layer, the first conductive layer configured to function as one electrode of the capacitor,

wherein the semiconductor layer comprises a source and a drain,

wherein the second conductive layer is configured to function as the other electrode of the capacitor,

wherein the first insulating layer is configured to function as a gate insulating film,

wherein the first insulating layer is in contact with the source and the drain of the semiconductor layer, and

wherein the third conductive layer is electrically connected to one of the source and the drain of the semiconductor layer through a second opening portion formed in the first insulating layer.

2 . The display device according to claim 1 ,

wherein the pixel further comprises a liquid crystal element.

3 . The display device according to claim 1 ,

the transistor further comprising:

a fourth conductive layer configured to function as a first gate electrode; and

a fifth conductive layer configured to function as a second gate electrode,

wherein the fourth conductive layer is electrically connected to the fifth conductive layer through a third opening portion, and

wherein the fourth conductive layer is in contact with a top surface of the first insulating layer overlapping with a channel formation region of the semiconductor layer.

4 . The display device according to claim 3 ,

wherein, when seen from above, the semiconductor layer and the third opening portion do not overlap each other.

5 . The display device according to claim 1 ,

wherein, when seen from above, the semiconductor layer, the first conductive layer, the second conductive layer, and the third conductive layer extend in the same direction.

6 . A display device comprising a pixel, the pixel comprising:

a transistor comprising a semiconductor layer and a first insulating layer; and

a capacitor comprising a first conductive layer, a second conductive layer under the first conductive layer, and a second insulating layer sandwiched between the first conductive layer and the second conductive layer,

wherein the first conductive layer is configured to function as one electrode of the capacitor,

wherein the second conductive layer is configured to function as the other electrode of the capacitor,

wherein the semiconductor layer comprises a source and a drain,

wherein the first insulating layer is in contact with top surfaces of the source and the drain of the semiconductor layer,

wherein the first insulating layer is configured to function as a gate insulating film,

wherein the first conductive layer is electrically connected to one of the source and the drain of the semiconductor layer through a first opening portion formed in the second insulating layer,

wherein a level of a top surface of a channel formation region is higher than levels of the top surfaces of the source and the drain of the semiconductor layer, and

wherein the capacitor does not overlap with the semiconductor layer.

7 . The display device according to claim 6 ,

wherein the pixel further comprises a liquid crystal element.

8 . The display device according to claim 6 ,

the transistor further comprising:

a third conductive layer configured to function as a first gate electrode; and

a fourth conductive layer configured to function as a second gate electrode,

wherein the third conductive layer is electrically connected to the fourth conductive layer through a third opening portion.

9 . The display device according to claim 6 ,

wherein, when seen from above, the semiconductor layer and the third opening portion do not overlap each other.

10 . The display device according to claim 6 ,

wherein, when seen from above, the semiconductor layer, the first conductive layer, and the second conductive layer extend in the same direction.

11 . The display device according to claim 6 ,

the transistor further comprising:

a third conductive layer;

a fourth conductive layer configured to function as a first gate electrode; and

a fifth conductive layer configured to function as a second gate electrode,

wherein the first conductive layer is directly connected to the third conductive layer through the first opening portion,

wherein the third conductive layer is electrically connected to one of the source and the drain of the semiconductor layer through a second opening portion formed in the first insulating layer, and

wherein the fourth conductive layer is in contact with a top surface of the first insulating layer overlapping with a channel formation region of the semiconductor layer.

12 . The display device according to claim 11 ,

wherein the fourth conductive layer is electrically connected to the fifth conductive layer through a third opening portion.

Priority Claims (1)
JP 2018-066787 · Mar 30, 2018 · national
Continuity (2)
Continuation 17042326
Related Publication 20230088632A1 · Mar 23, 2023
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