Nitride-containing STI liner for SIGE channel
A semiconductor device includes a fin structure that protrudes vertically out of a substrate, wherein the fin structure contains silicon germanium (SiGe). An epi-silicon layer is disposed on a sidewall of the fin structure. The epi-silicon layer contains nitrogen. One or more dielectric liner layers are disposed on the epi-silicon layer. A dielectric isolation structure is disposed over the one or more dielectric liner layers.
1 . A semiconductor device, comprising:
an epitaxial semiconductor layer that protrudes vertically out of a substrate in a first direction;
a first liner disposed beside the epitaxial semiconductor layer in a second direction different from the first direction, wherein the first liner contains crystal silicon and an implanted material;
a second liner disposed beside the first liner in the second direction, wherein the second liner and the first liner have different material compositions, wherein a maximum dimension of the second liner in the second direction is greater than a maximum dimension of the first liner in the second direction; and
an isolation structure disposed over the second liner.
2 . The semiconductor device of claim 1 , wherein the epitaxial semiconductor layer includes silicon germanium (SiGe).
3 . The semiconductor device of claim 1 , wherein the epitaxial semiconductor layer is a part of a channel of a transistor.
4 . The semiconductor device of claim 3 , wherein the transistor is a PMOS transistor.
5 . The semiconductor device of claim 1 , wherein the implanted material includes nitrogen.
6 . The semiconductor device of claim 1 , wherein the second liner includes a dielectric material.
7 . The semiconductor device of claim 6 , wherein the dielectric material includes silicon oxide or silicon nitride.
8 . The semiconductor device of claim 1 , wherein:
the second liner defines a recess; and
the isolation structure fills the recess.
9 . The semiconductor device of claim 1 , wherein the second liner and the isolation structure have different material compositions.
10 . The semiconductor device of claim 1 , wherein the first liner is in direct contact with both the epitaxial semiconductor layer and the second liner.
11 . The semiconductor device of claim 1 , wherein the second liner is substantially thicker than the first liner in the second direction.
12 . A semiconductor device, comprising:
a channel component of a P-type transistor;
a crystal silicon liner formed on a side surface of the channel component, wherein the crystal silicon liner is doped with nitrogen;
a dielectric liner formed on a side surface of the crystal silicon liner, wherein the crystal silicon liner has substantially co-planar uppermost surfaces with the channel component or with the dielectric liner; and
a shallow trench isolation (STI) structure disposed over the dielectric liner.
13 . The semiconductor device of claim 12 , wherein:
in a cross-sectional side view, the dielectric liner has two vertically-extending segments and a horizontally-extending segment; and
the STI structure is located over the horizontally-extending segment and between the two vertically-extending segments.
14 . The semiconductor device of claim 13 , wherein each of the two vertically-extending segments has a greater width than the crystal silicon liner.
15 . The semiconductor device of claim 12 , wherein:
the channel component contains silicon germanium (SiGe); and
the dielectric liner contains at least one of silicon oxide or silicon nitride.
16 . A semiconductor device, comprising:
a fin structure that protrudes vertically out of a substrate, wherein the fin structure contains silicon germanium (SiGe);
an epi-silicon layer disposed on a sidewall of the fin structure, wherein the epi-silicon layer contains nitrogen;
one or more dielectric liner layers disposed on the epi-silicon layer, wherein the epi-silicon layer and the one or more dielectric liner layers have substantially co-planar bottommost surfaces; and
a dielectric isolation structure disposed over the one or more dielectric liner layers.
17 . The semiconductor device of claim 16 , wherein:
the one or more dielectric liner layers include a silicon oxide layer; and
the dielectric isolation structure includes a shallow trench isolation (STI) that is formed directly on the silicon oxide layer.
18 . The semiconductor device of claim 17 , wherein the silicon oxide layer contains nitrogen.
19 . The semiconductor device of claim 16 , wherein:
the one or more dielectric liner layers include a silicon nitride layer; and
the dielectric isolation structure includes a shallow trench isolation (STI) that is formed directly on the silicon nitride layer.
20 . The semiconductor device of claim 16 , wherein:
the one or more dielectric liner layers include a silicon oxide layer formed on the epi-silicon layer and a silicon nitride layer formed on the silicon oxide layer; and
the dielectric isolation structure includes a shallow trench isolation (STI) that is formed directly on the silicon nitride layer.