Semiconductor device having different size active regions and method of making
A semiconductor device includes a first cell in a first row, wherein the first row extends in a first direction, the first cell having a first cell height measured in a second direction perpendicular to the first direction. The semiconductor device further includes a second cell in the first row, wherein the second cell has a second cell height measured in the second direction, the second cell height is less than the first cell height. The second cell includes a first active region having a first width measured in the second direction, and a second active region having a second width measured in the second direction, wherein the second width is different from the first width.
1 . A semiconductor device, comprising:
a first cell in a first row, wherein the first row extends in a first direction, the first cell having a first cell height measured in a second direction perpendicular to the first direction; and
a second cell in the first row, wherein the second cell has a second cell height measured in the second direction, the second cell height is less than the first cell height, and the second cell comprises:
a first active region having a first width measured in the second direction, and
a second active region having a second width measured in the second direction, wherein the second width is different from the first width.
2 . The semiconductor device of claim 1 , wherein the first cell directly abuts the second cell.
3 . The semiconductor device of claim 1 , wherein the first cell comprises a third active region having the first width.
4 . The semiconductor device of claim 3 , wherein the third active region is aligned with the first active region.
5 . The semiconductor device of claim 3 , wherein an edge of the third active region is aligned with an edge of the second active region.
6 . The semiconductor device of claim 1 , wherein the second active region is farther from the first cell than the first active region.
7 . The semiconductor device of claim 1 , wherein the first cell height is twice the second cell height.
8 . The semiconductor device of claim 1 , further comprising a source/drain (S/D) region electrically connected to the first active region.
9 . The semiconductor device of claim 8 , further comprising a bottom isolation structure between the S/D region and a substrate.
10 . The semiconductor device of claim 8 , further comprising a well in a substrate below the S/D region.
11 . The semiconductor device of claim 1 , further comprising a front side power delivery network (PDN).
12 . The semiconductor device of claim 1 , further comprising a backside PDN.
13 . The semiconductor device of claim 12 , further comprising a via extending through a substrate, wherein the via electrically connects the backside PDN to the first active region.
14 . The semiconductor device of claim 12 , further comprising a contact structure extending through a substrate, wherein the contact structure is electrically connected to the backside PDN, and the contact structure is aligned with a boundary of the first cell.
15 . The semiconductor device of claim 14 , wherein the first cell comprises a third active region, the third active region comprises an S/D region, and the contact structure is electrically connected to the S/D region.
16 . A semiconductor device, comprising:
a first cell in a first row, wherein the first row extends in a first direction, the first cell having a first cell height measured in a second direction perpendicular to the first direction, and the first cell comprises a first active region having a first width in the second direction;
a second cell in the first row, wherein the second cell has a second cell height measured in the second direction, the second cell height is less than the first cell height, and the second cell comprises:
a second active region having the first width, and
a third active region having a second width measured in the second direction,
wherein the second width is different from the first width; and
a third cell in a second row, wherein the third cell comprises a fourth active region having the second width, and the third cell directly abuts the first cell.
17 . The semiconductor device of claim 16 , wherein the first active region comprises a plurality of nano-sheets.
18 . The semiconductor device of claim 16 , further comprising a contact structure extending through a substrate at an interface of the first cell and the third cell.
19 . The semiconductor device of claim 16 , further comprising a substrate, wherein a dopant concentration of the substrate is uniform across an entirety of the substrate.
20 . A semiconductor device, comprising:
a first cell in a first row, wherein the first row extends in a first direction, the first cell having a first cell height measured in a second direction perpendicular to the first direction;
a second cell in the first row, wherein the second cell has a second cell height measured in the second direction, the second cell height is less than the first cell height, and the second cell comprises:
a first active region, in a substrate, having a first width measured in the second direction, and
a second active region, in the substrate, having a second width measured in the second direction, wherein the second width is different from the first width; and
a conductive contact structure extending through the substrate.