IP Library Granted Patent US 12,641,856
Granted Patent B2
US 12,641,856 · App. 18/120,704 · Granted May 26, 2026

Semiconductor device

Inventors: Takuya Yasutake (Kanazawa Ishikawa, JP); Hiroaki Katou (Nonoichi Ishikawa, JP)
Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation
H10D64/118H10D30/0297H10D30/668H10D64/01H10D64/117
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Quick Facts
Patent No.
US 12,641,856
App. No.
18/120,704
Granted
May 26, 2026
Kind
B2
Abstract

A semiconductor device according to the present embodiment includes a drain electrode, a source electrode, a semiconductor region disposed between the drain electrode and the source electrode, a gate electrode disposed in the semiconductor region via a first insulation film, and a second insulation film disposed between the gate electrode and the source electrode and having a specific dielectric constant higher than a specific dielectric constant of the first insulation film.

Claims (30)

1 . A semiconductor device comprising:

a drain electrode;

a source electrode;

a semiconductor region disposed between the drain electrode and the source electrode;

a gate electrode disposed in the semiconductor region via a first insulation film;

a second insulation film disposed between the gate electrode and the source electrode and having a specific dielectric constant higher than a specific dielectric constant of the first insulation film; and

a third insulation film provided between the second insulation film and the source electrode, and provided with an opening through which the second insulation film is exposed,

wherein the opening is located between the gate electrode and the source electrode, and a part of the source electrode is disposed in the opening.

2 . The semiconductor device according to claim 1 , further comprising a fourth insulation film partially disposed on the second insulation film located in the opening.

3 . The semiconductor device according to claim 1 , wherein the gate electrode extends in a second direction orthogonal to a first direction from the drain electrode toward the source electrode, and

a plurality of the openings are provided in the second direction and in a third direction orthogonal to the first direction and the second direction.

4 . The semiconductor device according to claim 1 , wherein the third insulation film is made of silicon oxide.

5 . A semiconductor device comprising:

a drain electrode;

a source electrode;

a semiconductor region disposed between the drain electrode and the source electrode;

a gate electrode disposed in the semiconductor region via a first insulation film;

a second insulation film disposed between the gate electrode and the source electrode and having a specific dielectric constant higher than a specific dielectric constant of the first insulation film; and

a third insulation film provided between the second insulation film and the source electrode, and provided with a plurality of openings through which the second insulation film is exposed,

wherein the gate electrode extends in a second direction orthogonal to a first direction from the drain electrode toward the source electrode, and includes a first gate electrode and a second gate electrode that are provided to be separated from each other in a third direction orthogonal to the first direction and the second direction, and a part of the first insulation film is provided between the first gate electrode and the second gate electrode, and

wherein each of the openings is provided between the first gate electrode and the source electrode and between the second gate electrode and the source electrode, and a part of the source electrode is disposed in the opening.

6 . A semiconductor device comprising:

a drain electrode;

a source electrode;

a semiconductor region disposed between the drain electrode and the source electrode;

a gate electrode provided in the semiconductor region via a first insulation film; and

a second insulation film provided between the semiconductor region and the source electrode, and provided with an opening at a position corresponding to an upper side of the first insulation film,

wherein the gate electrode extends in a second direction orthogonal to a first direction from the drain electrode toward the source electrode, and includes a first gate electrode and a second gate electrode that are provided to be separated from each other in a third direction orthogonal to the first direction and the second direction,

wherein the source electrode includes an inter-gate electrode disposed between the first gate electrode and the second gate electrode, and the first insulation film is disposed between the source electrode and the first gate electrode and between the source electrode and the second gate electrode, and

wherein the opening is located between the gate electrode and the source electrode, and a part of the source electrode is disposed in the opening.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2026
From: YASUTAKE, TAKUYA; KATOU, HIROAKI
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 074303/0085 →
Priority Claims (1)
JP 2022-149560 · Sep 20, 2022 · national
Continuity (1)
Related Publication 20240096974A1 · Mar 21, 2024
References Cited (45)
US 7176520B2 · Miyake et al. · 2007 [cited by applicant]
US 7279743B2 · Pattanayak et al. · 2007 [cited by applicant]
US 7420213B2 · Chae et al. · 2008 [cited by applicant]
US 8816393B2 · Yamamura · 2014 [cited by applicant]
US 8969157B2 · Takahashi et al. · 2015 [cited by applicant]
US 8981470B2 · Nozu · 2015 [cited by applicant]
US 9000497B2 · Sato et al. · 2015 [cited by applicant]
US 9177813B2 · Miura · 2015 [cited by applicant]
US 9530850B2 · Aichinger et al. · 2016 [cited by applicant]
US 10121892B2 · Nishiwaki · 2018 [cited by examiner]
US 11107898B2 · Kikuchi · 2021 [cited by examiner]
US 11462637B2 · Baba · 2022 [cited by applicant]
US 20060076898A1 · Kitazawa · 2006 [cited by applicant]
US 20070181939A1 · Huang et al. · 2007 [cited by applicant]
US 20070246770A1 · Nakamura et al. · 2007 [cited by applicant]
US 20130134505A1 · Kobayashi · 2013 [cited by examiner]
US 20130168760A1 · Hsieh · 2013 [cited by applicant]
US 20130228788A1 · Yamamura · 2013 [cited by applicant]
US 20140077278A1 · Nozu · 2014 [cited by applicant]
US 20140077778A1 · Sato et al. · 2014 [cited by applicant]
US 20140287574A1 · Takahashi et al. · 2014 [cited by applicant]
US 20160020107A1 · Miura · 2016 [cited by applicant]
US 20170213908A1 · Fursin · 2017 [cited by examiner]
US 20170263767A1 · Nishiwaki · 2017 [cited by examiner]
US 20200403076A1 · Ku et al. · 2020 [cited by applicant]
US 20210288176A1 · Tomita · 2021 [cited by examiner]
US 20210296490A1 · Shiraishi · 2021 [cited by examiner]
US 20220157952A1 · Fujino · 2022 [cited by examiner]
JP 200695786A · 2006 [cited by applicant]
JP 2007513523A · 2007 [cited by applicant]
JP 2007165824A · 2007 [cited by applicant]
JP 2007523487A · 2007 [cited by applicant]
JP 2008263095A · 2008 [cited by applicant]
JP 201289851A · 2012 [cited by applicant]
JP 5063933B2 · 2012 [cited by applicant]
JP 2013182992A · 2013 [cited by applicant]
JP 2013183061A · 2013 [cited by applicant]
JP 2014060298A · 2014 [cited by applicant]
JP 5612830B2 · 2014 [cited by applicant]
JP 2016129226A · 2016 [cited by applicant]
JP 2022048752A · 2022 [cited by applicant]
WO 2005057615A2 · 2005 [cited by applicant]
WO 2005081323A2 · 2005 [cited by applicant]
WO 2015155828A1 · 2015 [cited by applicant]
Japanese Office Action mailed Sep. 5, 2025 in corresponding Japanese Patent Application 2022-149560 with English Translation, 8 pages. [cited by applicant]