IP Library Granted Patent US 12,660,093
Granted Patent B2
US 12,660,093 · App. 18/663,472 · Granted Jun 16, 2026

Circuit board and method of manufacturing the same

Inventors: Min Young Hwang (Seoul, KR); Byeong Kyun Choi (Seoul, KR); Jin Seok Lee (Seoul, KR); Moo Seong Kim (Seoul, KR)
Assignee: LG INNOTEK CO., LTD.
H05K3/10H05K1/09H05K2201/0355H05K2201/0358H05K2201/0959H05K2203/0723
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Quick Facts
Patent No.
US 12,660,093
App. No.
18/663,472
Granted
Jun 16, 2026
Kind
B2
Abstract

A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 μm to 5 μm.

Claims (51)

1 . A circuit board comprising:

an insulating layer including an upper surface, a lower surface, and a via hole passing through at least a portion of the insulating layer from the upper surface toward the lower surface; and

a via electrode disposed in the via hole of the insulating layer,

wherein the insulating layer includes a resin, and fillers dispersed in the resin,

wherein the fillers include a plurality of first fillers embedded in the insulating layer and not in contact with the via electrode, and a plurality of second fillers in contact with the via electrode,

wherein the via electrode has a slope in which a width decreases in a horizontal direction from the upper surface toward the lower surface,

wherein a shape of the plurality of first fillers and a shape of the plurality of second fillers are different from each other,

wherein the plurality of first fillers and the plurality of second fillers include a same material,

wherein the via electrode includes a side surface opposite to an inner wall surface of the via hole,

wherein the side surface of the via electrode includes a stepped portion, and

wherein the stepped portion overlaps the plurality of second fillers in a horizontal direction.

2 . The circuit board of claim 1 ,

wherein each of the plurality of second fillers includes a spherical surface and an aspherical surface, and

wherein the aspherical surface of each of the plurality of second fillers is in contact with the via electrode.

3 . The circuit board of claim 2 , wherein each of the plurality of first fillers does not include an aspherical surface.

4 . The circuit board of claim 3 , wherein the inner wall surface of the via hole includes an inner wall stepped portion.

5 . The circuit board of claim 4 ,

wherein the inner wall surface of the via hole includes a first surface provided as the aspherical surface of each of the plurality of second fillers, and a second surface provided as a resin of the insulating layer, and

wherein the inner wall stepped portion includes a first inner wall stepped portion that is provided at the first surface, a second inner wall stepped portion that is provided at the second surface.

6 . The circuit board of claim 4 , wherein the inner wall stepped portion is provided in plural numbers along an extending direction of the inner wall surface of the through hole.

7 . The circuit board of claim 5 , wherein the via electrode includes a first metal layer disposed on the inner wall surface of the through hole, and a second metal layer disposed on the first metal layer.

8 . The circuit board of claim 7 ,

wherein the first metal layer includes a first surface in contact with the inner wall surface of the through hole, and a second surface in contact with the second metal layer, and

wherein each of the first surface and the second surface of the first metal layer includes a stepped portion.

9 . The circuit board of claim 8 , wherein the second metal layer includes a stepped portion in contact with the stepped portion of the second surface of the first metal layer.

10 . The circuit board of claim 7 , wherein a crystal grain size of the first metal layer is smaller than a crystal grain size of the second metal layer.

11 . A circuit board comprising:

an insulating layer including a resin, and fillers dispersed in the resin,

wherein the fillers include a plurality of first fillers having a first shape, and a plurality of second fillers having a second shape different than the first shape;

wherein the plurality of first fillers and the plurality of second fillers include a same material,

wherein the insulating layer includes an upper surface and a lower surface, and a through hole passing through at least a portion of the insulating layer from the upper surface toward the lower surface,

wherein the through hole has a slope in which a width decreases in a horizontal direction from the upper surface toward the lower surface,

wherein at least a portion of each of the plurality of second fillers is not covered with the insulating layer, and

wherein the plurality of second fillers and the resin form an inner wall surface of the through hole of the insulating layer.

12 . The circuit board of claim 11 ,

wherein each of the plurality of second fillers includes a spherical surface and an aspherical surface,

wherein the second shape of one of the plurality of first fillers is a spherical shape, and

wherein at least a portion of the inner wall surface is provided as the aspherical surface of each of the plurality of second fillers.

13 . The circuit board of claim 12 , wherein the inner wall surface includes a stepped portion.

14 . The circuit board of claim 12 , further comprising:

a via electrode disposed in the through hole of the insulating layer,

wherein one of the plurality of second fillers is in contact with the via electrode, and

wherein one of the plurality of first fillers is embedded in the insulating layer and not in contact with the via electrode.

15 . The circuit board of claim 14 ,

wherein the inner wall surface includes a stepped portion, and

wherein the stepped portion includes a first surface provided as the aspherical surface of the one of the plurality of second fillers and a second surface provided as the resin of the insulating layer.

16 . The circuit board of claim 15 ,

wherein the via electrode includes a first metal layer disposed on the first surface and the second surface of the inner wall surface, and a second metal layer disposed on the first metal layer,

wherein the first metal layer includes a contact surface in contact with the first surface and the second surface, and

wherein the contact surface of the first metal layer includes a stepped portion in contact with the stepped portion of the inner wall surface.

17 . The circuit board of claim 16 , wherein the first metal layer and the second metal layer are provided from different materials.

Priority Claims (2)
KR 10-2020-0112485 · Sep 3, 2020 · national
KR 10-2020-0113658 · Sep 7, 2020 · national
Continuity (2)
Continuation 17462157 · Aug 31, 2021
Related Publication 20240298410A1 · Sep 5, 2024
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