IP Library › Granted Patent US 12,695,531
Granted Patent B2
US 12,695,531 · App. 18/390,048 · Granted Jul 28, 2026

System and method to dynamically monitor clock offsets in a locked state

Inventors: Manik Singhal (Bengaluru, IN); Parthibhan Paramaguru (Bengaluru, IN)
Assignee: Cisco Technology, Inc.
H04J3/0667
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Quick Facts
Patent No.
US 12,695,531
App. No.
18/390,048
Filed
Dec 20, 2023
Granted
Jul 28, 2026
Kind
B2
Art Unit
2418
USPC
370/503
Abstract

An apparatus configured to dynamically maintain mutually traceable clocks of different types may comprise a memory and a processor communicatively coupled to one another. The processor may be configured to receive a first clock and a second clock from a first network device, receive a third clock from a second network device, and select the first clock as a Precision Time Protocol (PTP) clock. Further, processor may be configured to determine a first traceability between the first clock and the second clock, determine a second traceability between the first clock and the third clock, and select the second clock or the third clock as a Synchronous Ethernet (SyncE) clock.

Claims (134)

1 . An apparatus, comprising:

a memory configured to store:

a plurality of clock source selection operations configured to enable selection of one or more clock sources; and

a processor communicatively coupled to the memory and configured to:

receive a first clock and a second clock from a first network device;

receive a third clock from a second network device;

select the first clock as a Precision Time Protocol (PTP) clock;

obtain a first clock parameter corresponding to the first clock, the first clock parameter comprising a first value pattern;

obtain a second clock parameter corresponding to the second clock, the second clock parameter comprising a second value pattern;

obtain a third clock parameter corresponding to the third clock, the third clock parameter comprising a third value pattern;

determine a first traceability between the first value pattern and the second value pattern;

determine a second traceability between the first value pattern and the third value pattern;

determine whether the first traceability is greater than the second traceability;

in response to determining that the first traceability is greater than the second traceability, select the second clock as a Synchronous Ethernet (SyncE) clock; and

in response to determining that the first traceability is less than the second traceability, select the third clock as the SyncE clock.

2 . The apparatus of claim 1 , wherein the processor is further configured to:

receive a fourth clock from a third network device;

obtain a fourth clock parameter corresponding to the fourth clock, the fourth clock parameter comprising a fourth value pattern;

determine a third traceability between the first value pattern and the fourth value pattern;

determine whether the first traceability is greater than the third traceability;

in response to determining that the first traceability is greater than the third traceability, maintain the first clock as the SyncE clock; and

in response to determining that the first traceability is less than the third traceability, select the fourth clock as the SyncE clock.

3 . The apparatus of claim 1 , wherein the processor is further configured to:

receive a fourth clock from a third network device;

obtain a fourth clock parameter corresponding to the fourth clock, the fourth clock parameter comprising a fourth value pattern;

determine a third traceability between the first value pattern and the fourth value pattern;

determine whether the first traceability is greater than the third traceability; and

in response to determining that the first traceability is equal to the third traceability, maintain the first clock as the SyncE clock.

4 . The apparatus of claim 1 , wherein the processor is further configured to:

receive a fourth clock from a third network device;

receive a fifth clock from a fourth network device;

obtain a fourth clock parameter corresponding to the fourth clock, the fourth clock parameter comprising a fourth value pattern;

obtain a fifth clock parameter corresponding to the fifth clock, the fifth clock parameter comprising a fifth value pattern;

determine a third traceability between the first value pattern and the fourth value pattern;

determine a fourth traceability between the first value pattern and the fifth value pattern;

determine whether the third traceability is greater than the fourth traceability;

in response to determining that the third traceability is greater than the fourth traceability, select the fourth clock as the SyncE clock; and

in response to determining that the third traceability is less than the fourth traceability, select the fifth clock as the SyncE clock.

5 . The apparatus of claim 1 , wherein:

the first clock traceability indicates a first offset between the first clock and the second clock;

the second clock traceability indicates a second offset between the first clock and the third clock; and

the processor is further configured to:

in conjunction with determine whether the first traceability is greater than the second traceability, compare the first offset to the second offset;

determine whether the first offset is greater than the second offset;

in response to determining that the first offset is greater than the second offset, select the second clock as the SyncE clock; and

in response to determining that the first offset is lower than the second offset, select the second clock as the SyncE clock.

6 . The apparatus of claim 1 , wherein the processor is further configured to:

in conjunction with selecting the second clock as the SyncE clock, determine that the first clock and the second clock are in a locked state.

7 . The apparatus of claim 1 , wherein the processor is further configured to determine whether the first traceability is greater than the second traceability during a maintenance window.

8 . The apparatus of claim 1 , wherein the processor is further configured to determine whether the first traceability is greater than the second traceability outside of a maintenance window.

9 . A method, comprising:

receiving a first clock and a second clock from a first network device;

receiving a third clock from a second network device;

selecting the first clock as a Precision Time Protocol (PTP) clock;

obtaining a first clock parameter corresponding to the first clock, the first clock parameter comprising a first value pattern;

obtaining a second clock parameter corresponding to the second clock, the second clock parameter comprising a second value pattern;

obtaining a third clock parameter corresponding to the third clock, the third clock parameter comprising a third value pattern;

determining a first traceability between the first value pattern and the second value pattern;

determining a second traceability between the first value pattern and the third value pattern;

determining whether the first traceability is greater than the second traceability;

in response to determining that the first traceability is greater than the second traceability, selecting the second clock as a Synchronous Ethernet (SyncE) clock; and

in response to determining that the first traceability is less than the second traceability, selecting the third clock as the SyncE clock.

10 . The method of claim 9 , further comprising:

receiving a fourth clock from a third network device;

obtaining a fourth clock parameter corresponding to the fourth clock, the fourth clock parameter comprising a fourth value pattern;

determining a third traceability between the first value pattern and the fourth value pattern;

determining whether the first traceability is greater than the third traceability;

in response to determining that the first traceability is greater than the third traceability, maintaining the first clock as the SyncE clock; and

in response to determining that the first traceability is less than the third traceability, selecting the fourth clock as the SyncE clock.

11 . The method of claim 9 , further comprising:

receiving a fourth clock from a third network device;

obtaining a fourth clock parameter corresponding to the fourth clock, the fourth clock parameter comprising a fourth value pattern;

determining a third traceability between the first value pattern and the fourth value pattern;

determining whether the first traceability is greater than the third traceability; and

in response to determining that the first traceability is equal to the third traceability, maintaining the first clock as the SyncE clock.

12 . The method of claim 9 , further comprising:

receiving a fourth clock from a third network device;

receiving a fifth clock from a fourth network device;

obtaining a fourth clock parameter corresponding to the fourth clock, the fourth clock parameter comprising a fourth value pattern;

obtaining a fifth clock parameter corresponding to the fifth clock, the fifth clock parameter comprising a fifth value pattern;

determining a third traceability between the first value pattern and the fourth value pattern;

determining a fourth traceability between the first value pattern and the fifth value pattern;

determining whether the third traceability is greater than the fourth traceability;

in response to determining that the third traceability is greater than the fourth traceability, selecting the fourth clock as the SyncE clock; and

in response to determining that the third traceability is less than the fourth traceability, selecting the fifth clock as the SyncE clock.

13 . The method of claim 9 , wherein:

the first clock traceability indicates a first offset between the first clock and the second clock;

the second clock traceability indicates a second offset between the first clock and the third clock; and

the method further comprising:

in conjunction with determine whether the first traceability is greater than the second traceability, comparing the first offset to the second offset;

determine whether the first offset is greater than the second offset;

in response to determining that the first offset is greater than the second offset, selecting the second clock as the SyncE clock; and

in response to determining that the first offset is lower than the second offset, selecting the second clock as the SyncE clock.

14 . The method of claim 9 , further comprising:

in conjunction with selecting the second clock as the SyncE clock, determining that the first clock and the second clock are in a locked state.

15 . The method of claim 9 , further comprising:

determining whether the first traceability is greater than the second traceability during a maintenance window.

16 . The method of claim 9 , further comprising:

determining whether the first traceability is greater than the second traceability outside of a maintenance window.

17 . A non-transitory computer readable medium storing instructions that when executed by a processor cause the processor to:

receive a first clock and a second clock from a first network device;

receive a third clock from a second network device;

select the first clock as a Precision Time Protocol (PTP) clock;

obtain a first clock parameter corresponding to the first clock, the first clock parameter comprising a first value pattern;

obtain a second clock parameter corresponding to the second clock, the second clock parameter comprising a second value pattern;

obtain a third clock parameter corresponding to the third clock, the third clock parameter comprising a third value pattern;

determine a first traceability between the first value pattern and the second value pattern;

determine a second traceability between the first value pattern and the third value pattern;

determine whether the first traceability is greater than the second traceability;

in response to determining that the first traceability is greater than the second traceability, select the second clock as a Synchronous Ethernet (SyncE) clock; and

in response to determining that the first traceability is less than the second traceability, select the third clock as the SyncE clock.

18 . The non-transitory computer readable medium of claim 17 , wherein the processor is further caused to:

receive a fourth clock from a third network device;

obtain a fourth clock parameter corresponding to the fourth clock, the fourth clock parameter comprising a fourth value pattern;

determine a third traceability between the first value pattern and the fourth value pattern;

determine whether the first traceability is greater than the third traceability;

in response to determining that the first traceability is greater than the third traceability, maintain the first clock as the SyncE clock; and

in response to determining that the first traceability is less than the third traceability, select the fourth clock as the SyncE clock.

19 . The non-transitory computer readable medium of claim 17 , wherein the processor is further caused to:

receive a fourth clock from a third network device;

obtain a fourth clock parameter corresponding to the fourth clock, the fourth clock parameter comprising a fourth value pattern;

determine a third traceability between the first value pattern and the fourth value pattern;

determine whether the first traceability is greater than the third traceability; and

in response to determining that the first traceability is equal to the third traceability, maintain the first clock as the SyncE clock.

20 . The non-transitory computer readable medium of claim 17 , wherein the processor is further caused to:

receive a fourth clock from a third network device;

receive a fifth clock from a fourth network device;

obtain a fourth clock parameter corresponding to the fourth clock, the fourth clock parameter comprising a fourth value pattern;

obtain a fifth clock parameter corresponding to the fifth clock, the fifth clock parameter comprising a fifth value pattern;

determine a third traceability between the first value pattern and the fourth value pattern;

determine a fourth traceability between the first value pattern and the fifth value pattern;

determine whether the third traceability is greater than the fourth traceability;

in response to determining that the third traceability is greater than the fourth traceability, select the fourth clock as the SyncE clock; and

in response to determining that the third traceability is less than the fourth traceability, select the fifth clock as the SyncE clock.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2023
From: SINGHAL, MANIK; PARAMAGURU, PARTHIBHAN
To: CISCO TECHNOLOGY, INC.
Reel/Frame 065917/0491 →
Continuity (1)
Related Publication 20250211352A1 · Jun 26, 2025
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