Systems, methods, and apparatus for accessing memory with die-to-die interfaces
An apparatus may include a die including a memory interface, a die-to-die (D2D) circuit comprising a D2D interface, and an intermediate section connected between the memory interface and the D2D interface, wherein the intermediate section comprises a transaction converter. The intermediate section may be configured to transfer data through the D2D interface using a protocol. The D2D interface may be configured to transfer data using flow control. The D2D interface may be configured to transfer data using a raw format.
1 . An apparatus comprising:
a first die comprising:
a memory interface configured to transfer data using a memory transaction;
a first die-to-die (D2D) circuit comprising a first D2D interface configured to transfer data using at least one transfer unit; and
a transaction converter configured to convert between the memory transaction and the at least one transfer unit; and
a second die comprising:
a second D2D circuit comprising a second D2D interface connected to the first D2D interface; and
a memory controller connected to the second D2D circuit and configured to communicate with the memory interface.
2 . The apparatus of claim 1 , wherein the first die comprises one or more compute resources.
3 . The apparatus of claim 1 , wherein:
the first D2D interface comprises a D2D link interface; and
the transaction converter is configured to convert the memory transaction to the D2D link interface.
4 . The apparatus of claim 1 , wherein the first D2D interface is configured to transfer data using a raw format.
5 . The apparatus of claim 4 , wherein:
the first D2D interface comprises a D2D phy interface; and
the transaction converter is configured to convert a memory transaction to the D2D phy interface.
6 . The apparatus of claim 5 , wherein the first die is configured to pack data into a raw format.
7 . The apparatus of claim 1 wherein:
the transaction converter is a first transaction converter;
the first D2D interface comprises a D2D link interface; and
the second die comprises a second transaction converter configured to convert the memory transaction between the memory interface and the D2D link interface.
8 . The apparatus of claim 1 wherein:
the transaction converter is a first transaction converter;
the first D2D interface comprises a D2D phy interface; and
the second die comprises a second transaction converter configured to convert the memory transaction between the memory interface and the D2D phy interface.
9 . The apparatus of claim 1 , wherein the at least one transfer unit is configured for a raw format.
10 . The apparatus of claim 1 , wherein the at least one transfer unit comprises at least one flow control unit.
11 . An apparatus comprising:
a die comprising:
a memory interface;
a die-to-die (D2D) circuit comprising a D2D interface; and
an intermediate section configured to transfer data using the memory interface and the D2D interface, wherein the intermediate section comprises a transaction converter;
wherein the D2D interface comprises a D2D link interface, and the intermediate section comprises:
a memory controller configured to access a memory device using the memory interface;
a transaction converter connected to the memory controller using a protocol interface;
a compute resource connected to the transaction converter; and
a format converter connected to the compute resource and the D2D link interface;
wherein the transaction converter is configured to convert a memory transaction between the protocol interface and the compute resource; and
wherein the format converter is configured to convert one or more signals between the compute resource and the D2D link interface.
12 . An apparatus comprising:
a die comprising:
a memory interface;
a die-to-die (D2D) circuit comprising a D2D interface; and
an intermediate section configured to transfer data using the memory interface and the D2D interface, wherein the intermediate section comprises a transaction converter;
wherein the D2D interface comprises a D2D link interface, and the intermediate section comprises:
a transaction converter;
a compute resource connected to the transaction converter; and
a format converter connected to the compute resource and the D2D link interface;
wherein the transaction converter is configured to convert a memory transaction between the memory interface and the compute resource; and
wherein the format converter is configured to convert one or more signals between the compute resource and the D2D link interface.
13 . An apparatus comprising:
a die comprising:
a memory interface;
a die-to-die (D2D) circuit comprising a D2D interface; and
an intermediate section configured to transfer data using the memory interface and the D2D interface, wherein the intermediate section comprises a transaction converter;
wherein the D2D interface comprises a D2D phy interface, and the intermediate section comprises:
a transaction converter;
a compute resource connected to the transaction converter; and
a format converter connected to the compute resource and the D2D phy interface;
wherein the transaction converter is configured to convert a memory transaction between the memory interface and the compute resource; and
wherein the format converter is configured to convert one or more signals between the compute resource and the D2D phy interface.
14 . An apparatus comprising:
a first die comprising:
a memory interface configured to transfer data using a memory transaction;
a first die-to-die (D2D) circuit comprising a first D2D interface configured to transfer data using at least one transfer unit; and
a first transaction converter connected between the memory interface and the first D2D interface and configured to convert between the memory transaction and the at least one transfer unit; and
a second die comprising:
a second D2D circuit comprising a second D2D interface connected to the first D2D interface and configured to transfer data using the at least one transfer unit; and
a second transaction converter connected to the second D2D circuit and configured to convert between the memory transaction and the at least one transfer unit.
15 . The apparatus of claim 14 , further comprising a protocol layer connected between the memory interface and the first D2D interface.
16 . The apparatus of claim 14 , wherein the first D2D circuit comprises a link layer configured to transfer data using flow control.
17 . The apparatus of claim 14 , wherein the first D2D circuit comprises a phy layer configured to transfer data using a raw format.
18 . The apparatus of claim 14 , wherein the at least one transfer unit is configured for a raw format.
19 . The apparatus of claim 14 , wherein the at least one transfer unit comprises at least one flow control unit.
20 . A method comprising:
performing, at a first die, using a memory interface, a memory transaction;
converting, at the first die, the memory transaction to a form comprising at least one transfer unit for a first die-to-die (D2D) interface;
transferring, from the first die to a second die comprising a second D2D interface, using the first D2D interface, the second D2D interface, and the at least one transfer unit, data associated with the memory transaction; and
converting, at the second die, the at least one transfer unit to the memory transaction.