IP Library Granted Patent US 8,253,400
Granted Patent B2
US 8,253,400 · App. 12/536,595 · Granted Aug 28, 2012

Current sensing for high voltage buck converter

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Quick Facts
Patent No.
US 8,253,400
App. No.
12/536,595
Granted
Aug 28, 2012
Kind
B2
Abstract

Methods, systems, and devices are described for providing output (e.g., current) sensing and feedback in high-voltage switching power converter topologies. Certain aspects of high voltage switching converter topologies may make output (e.g., current) sensing difficult. In some embodiments, a sampling module implements sample-and-hold techniques in a low-side switch converter topology to provide reliable current sensing. Embodiments of the sampling module provide certain functionality, including integration, blanking, buffering, and adjustable sampling frequency. Further, some embodiments include feedback functionality for generating a converter driver signal (for driving the switching converter) and/or a sample driver signal (for driving the sampling module) as a function of sensed output feedback from the sampling module.

Claims (73)

1. A circuit, comprising:

an output sensing module, configured to be communicatively coupled with a switching power converter, and operable to generate an output sense signal as a function of a load output, wherein:

the switching power converter includes a low-side switching module coupled with a bus voltage through a magnetic element and a load and configured to store energy in the magnetic element when the low-side switching module is in an on state, and is operable to receive a converter driver signal having a duty cycle and switch the bus voltage as a function of the converter driver signal to generate the load output as a function of the duty cycle; and

the output sense signal has a period, including:

a first portion of the period, during which the low-side switching module is in the on state and the output sense signal substantially correlates with the load output; and

a second portion of the period, during which the output sense signal substantially does not correlate with the load output; and

a sampling module, communicatively coupled with the output sensing module, and operable to sample the output sense signal during the first portion of the period to generate an output sense level that is functionally related to the load output.

2. The circuit of claim 1 , wherein the sampling module comprises:

a switching unit, configured to operate in an open mode and a closed mode;

a switch driver unit, operable to control operation of the switching unit; and

a holding unit, operable to:

record a level of the output sense signal when the switching unit is operating in the closed mode; and

generate the output sense level by holding the level of the output sense signal when the switching unit is operating in the open mode.

3. The circuit of claim 2 , wherein:

the switch driver unit is operable to control operation of the switching unit as a function of a sample driver signal, the sample driver signal being functionally related to the converter driver signal.

4. The circuit of claim 1 , further comprising:

a feedback unit, operable to generate the converter driver signal as a function of the output sense level.

5. The circuit of claim 4 , wherein:

the feedback unit comprises an oscillator unit configured to generate an oscillation signal at an oscillation frequency; and

the feedback unit is operable to generate the converter driver signal as a function of the oscillation signal.

6. The circuit of claim 5 , wherein the feedback unit further comprises:

an error amplifier unit, operable to generate an error level as a function of the output sense level and a reference level; and

a comparator unit, communicatively coupled with the oscillator unit and the error amplifier unit, and operable to generate a feedback output signal as a function of comparing the error level against the oscillation signal, such that a duty cycle of the feedback output signal is a function of the error level,

wherein the converter driver signal is generated as a function of the feedback output signal, such that the duty cycle of the converter driver signal is substantially equal to the duty cycle of the feedback output signal.

7. The circuit of claim 6 , wherein the sampling module comprises:

a sampler configured to be driven at a sampling frequency by a switch driver signal,

wherein the sample driver signal is generated as a function of the feedback output signal, such that the sampling frequency is a function of the oscillation frequency.

8. The circuit of claim 7 , wherein:

the oscillator unit is operable to generate the oscillation frequency at an adjustable oscillation frequency; and

the sample driver signal is generated as a function of the feedback output signal, such that the sampling frequency is adjustable as a function of the adjustable oscillation frequency.

9. The circuit of claim 1 , wherein the sampling module further comprises an integration unit.

10. The circuit of claim 1 , wherein the sampling module further comprises a delay unit, operable to delay sampling of the output sense signal to ensure sampling of the output sense signal during the first portion of the period.

11. The circuit of claim 10 , wherein the delay unit is configured to provide an adjustable amount of delay.

12. The circuit of claim 1 , wherein the sampling module further comprises a buffer unit configured to provide a level of output impedance for the sampling module.

13. The circuit of claim 1 , wherein:

the load output is a load current; and

the output sensing module comprises a current sensing unit.

14. The circuit of claim 1 , wherein:

the load output is a load current; and

the output sensing module is communicatively coupled with the low-side switching module, and operable to generate the output sense signal as a function of current through the low-side switching module.

15. The circuit of claim 14 , wherein:

the current through the low-side switching module is characterized by a switch current waveform having

a spike portion that includes a current spike,

a correlative portion during which the current through the low-side switching module substantially correlates with the load output, and

an off portion during which the current through the low-side switching module is substantially zero; and

the first portion of the output sense signal corresponds temporally with the correlative portion of the switch current waveform.

16. The circuit of claim 1 , further comprising the switching power converter.

17. A method comprising:

generating an output sense signal as a function of a load output, the load output being generated by a switching power converter that includes a low-side switching module coupled with a bus voltage through a magnetic clement and a load and configured to store energy in the magnetic element when the low-side switching module is in an on state, the switching power converter being operable to receive a converter driver signal having a duty cycle and switch the bus voltage as a function of the converter driver signal to generate the load output as a function of the duty cycle, wherein the output sense signal has a period, including:

a first portion of the period, during which the low-side switching module is in the on state and the output sense signal substantially correlates with the load output; and

a second portion of the period, during which the output sense signal substantially does not correlate with the load output; and

sampling the output sense signal only during the first portion of the period to generate an output sense level that is functionally related to the load output.

18. The method of claim 17 , wherein sampling the output sense signal comprises:

generating a sample driver signal as a function of the converter driver signal, the sample driver signal having a period, each period having a sample portion and a hold portion; and

driving a sampling unit using the sample driver signal such that the sampling unit records a level of the output sense signal during the sample portion of at least one period and holds the level of the output sense signal during the hold portion of the at least one period, wherein the output sense level is the level of the output sense signal held during the hold portion of the at least one period.

19. The method of claim 17 , further comprising:

generating the converter driver signal as a function of the output sense level.

20. The method of claim 19 , wherein generating the converter driver signal as a function of the output sense level comprises:

generating an oscillation signal at an oscillation frequency; and

generating the converter driver signal as a function of comparing the oscillation signal against the output sense signal.

21. The method of claim 20 , further comprising:

generating a sample driver signal as a function of the oscillation signal, the sample driver signal configured to be used for driving sampling of the output sense signal and having a sampling frequency that is functionally related to the oscillation frequency.

22. The method of claim 21 , wherein:

the oscillation frequency is adjustable; and

the sample driver signal is generated as a function of the oscillation signal such that the sampling frequency is adjustable as a function of the adjustable oscillation frequency.

23. A system comprising:

means for generating an output sense signal as a function of a load output, the load output being generated by a switching power converter that includes a low-side switching module coupled with a bus voltage through a magnetic element and a load and configured to store energy in the magnetic element when the low-side switching module is in an on state, the switching power converter being operable to receive a converter driver signal having a duty cycle and switch the bus voltage as a function of the converter driver signal to generate the load output as a function of the duty cycle, wherein the output sense signal has a period, including:

a first portion of the period, during which the low-side switching module is in the on state and the output sense signal substantially correlates with the load output; and

a second portion of the period, during which the output sense signal substantially does not correlate with the load output; and

means for sampling the output sense signal only during the first portion of the period to generate an output sense level that is functionally related to the load output.

24. The system of claim 23 , wherein the means for sampling the output sense signal comprises:

means for generating a sample driver signal as a function of the converter driver signal, the sample driver signal having a period, each period having a sample portion and a hold portion; and

means for sampling as a function of the sample driver signal by recording a level of the output sense signal during the sample portion of at least one period and holding the level of the output sense signal during the hold portion of the at least one period.

Assignments (18)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
SECURITY AGREEMENT Recorded Apr 22, 2015
From: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP; MICROSEMI SEMICONDUCTOR (U.S.) INC.; MICROSEMI SOC CORP.; MICROSEMI FREQUENCY AND TIME CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 035477/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2011
From: ASIC ADVANTAGE INC.
To: MICROSEMI CORPORATION
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2009
From: IRISSOU, PIERRE; COLMET-DAAGE, ETIENNE
To: ASIC ADVANTAGE INC.
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