IP Library Granted Patent US 9,082,638
Granted Patent B2
US 9,082,638 · App. 13/572,517 · Granted Jul 14, 2015

Semiconductor device with cross-talk isolation using M-cap

Inventors: YongTaek Lee (Seoul, KR); Gwang Kim (Ichon si, KR); ByungHoon Ahn (KyungKi-Do, KR)
Assignee: STATS ChipPAC, Ltd.
H01L27/08H01L23/5225H01L28/10H01L28/20H01L28/40H01L23/5223H01L27/1203H01L2924/0002H01L2924/3011
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Quick Facts
Patent No.
US 9,082,638
App. No.
13/572,517
Granted
Jul 14, 2015
Kind
B2
Abstract

A semiconductor device is made by forming an oxide layer over a substrate and forming a first conductive layer over the oxide layer. The first conductive layer is connected to ground. A second conductive layer is formed over the first conductive layer as a plurality of segments. A third conductive layer is formed over the second conductive layer as a plurality of segments. If the conductive layers are electrically isolated, then a conductive via is formed through these layers. A first segment of the third conductive layer operates as a first passive circuit element. A second segment operates as a second passive circuit element. A third segment is connected to ground and operates as a shield disposed between the first and second segments. The shield has a height at least equal to a height of the passive circuit elements to block cross-talk between the passive circuit elements.

Claims (60)

1. A method of making a semiconductor device, comprising:

providing a substrate;

forming a passive circuit over the substrate; and

forming a shielding layer over the substrate adjacent to the passive circuit by,

(a) forming a first conductive layer over the substrate, and

(b) forming a second conductive layer with a major surface of the second conductive layer contacting a major surface of the first conductive layer.

2. The method of claim 1 , wherein the shielding layer includes a height at least a height of the passive circuit.

3. The method of claim 1 , wherein forming the passive circuit includes:

forming a third conductive layer over the substrate; and

forming a fourth conductive layer over the third conductive layer.

4. The method of claim 1 , further including forming a conductive via through the first conductive layer and second conductive layer.

5. The method of claim 1 , wherein the passive circuit is selected from the group consisting of a resistor, inductor, capacitor, and signal trace.

6. A method of making a semiconductor device, comprising:

providing a substrate;

forming an M-cap layer over the substrate;

forming a passive circuit over the substrate; and

forming a shielding layer over the M-cap layer adjacent to the passive circuit by,

(a) forming a first conductive layer over the M-cap layer,

(b) forming a second conductive layer contacting the first conductive layer, and

(c) forming a conductive via through the M-cap layer, first conductive layer, and second conductive layer.

7. The method of claim 6 , wherein the shielding layer includes a height at least a height of the passive circuit.

8. The method of claim 6 , wherein forming the passive circuit includes:

forming a third conductive layer over the substrate; and

forming a fourth conductive layer over the third conductive layer.

9. The method of claim 6 , wherein the passive circuit is selected from the group consisting of a resistor, inductor, capacitor, and signal trace.

10. A semiconductor device, comprising:

a substrate;

a passive circuit formed over the substrate; and

a shielding layer formed over the substrate adjacent to the passive circuit, the shielding layer including,

(a) a first conductive layer formed over the substrate, and

(b) a second conductive layer with a major surface of the second conductive layer contacting a major surface of the first conductive layer.

11. The semiconductor device of claim 10 , wherein the shielding layer includes a height at least a height of the passive circuit.

12. The semiconductor device of claim 10 , wherein the passive circuit includes:

a third conductive layer formed over the substrate; and

a fourth conductive layer formed over the third conductive layer.

13. The semiconductor device of claim 10 , further including a conductive via formed through the first conductive layer and second conductive layer.

14. A semiconductor device, comprising:

a substrate;

an M-cap layer formed over the substrate;

a passive circuit formed over the substrate; and

a shielding layer formed over the M-cap layer adjacent to the passive circuit, the shielding layer including,

(a) a first conductive layer formed over the M-cap layer,

(b) a second conductive layer contacting a surface of the first conductive layer, and

(c) a conductive via formed through the first conductive layer and second conductive layer.

15. The semiconductor device of claim 14 , wherein the shielding layer includes a height at least a height of the passive circuit.

16. The semiconductor device of claim 14 , wherein the passive circuit includes:

a third conductive layer formed over the substrate; and

a fourth conductive layer formed over the third conductive layer.

17. A semiconductor device, comprising:

a substrate;

a passive circuit formed over the substrate; and

a shielding layer formed over the substrate adjacent to the passive circuit, the shielding layer including,

(a) a first conductive layer formed over the substrate,

(b) a second conductive layer formed over the first conductive layer, and

(c) a conductive via formed through the first conductive layer and second conductive layer.

18. The semiconductor device of claim 17 , wherein the passive circuit includes:

a third conductive layer formed over the substrate; and

a fourth conductive layer formed over the third conductive layer.

19. The semiconductor device of claim 17 , further including an insulating layer formed between the first conductive layer and second conductive layer.

20. The semiconductor device of claim 17 , wherein the passive circuit is selected from the group consisting of a resistor, inductor, capacitor, and signal trace.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED ON REEL 038378 FRAME 0418. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064908/0920 →
RELEASE OF SECURITY INTEREST Recorded Jun 17, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 053511/0298 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0352 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0418 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (2)
Continuation 12051253 · Mar 19, 2008
Related Publication 20120299149A1 · Nov 29, 2012