IP Library Assignment 005906/0056
Patent Assignment
Reel/Frame 005906/0056

Security Interest

Recorded: 1991-11-04 Pages: 9
Covered Properties (49)
Mos Bootstrap Inverter Circuit
Patent: 3,912,948 →
Application: 05/176,128 →
Title Not Available
Application: 05/750,368 →
Synchronous Binary Counter Utilizing a Pipeline Toggle Signal Propagation Technique
Patent: 4,214,173 →
Application: 05/883,285 →
Last-Stage Programming of Semiconductor Integrated Circuits Including Selective Removal of Passivation Layer
Patent: 4,208,780 →
Application: 05/930,739 →
Semiconductor Integrated Circuit Structure with Selectively Modified Insulation Layer
Patent: 4,600,933 →
Application: 06/049,916 →
Method of Fabricating High Density Refractory Metal Gate Mos Integrated Circuits Utilizing the Gate as a Selective Diffusion and Oxidation Mask
Patent: 4,282,647 →
Application: 06/079,163 →
Tool for Removing Integrated Circuits from a Burn-in Board
Patent: 4,324,040 →
Application: 06/172,018 →
Method for Manufacturing Metal-Oxide Silicon Devices
Patent: 4,335,502 →
Application: 06/192,872 →
Low Power Storage Cell
Patent: 4,394,751 →
Application: 06/200,085 →
Hermetic Plastic Dual-in-Line Package for a Semiconductor Integrated Circuit
Patent: 4,298,769 →
Application: 06/229,193 →
Software Security Method Using Partial Fabrication of Porprietary Control Word Decoders & Microinstruction Memories
Patent: 4,513,174 →
Application: 06/245,498 →
Chip Topography for Mos Packet Network Interface Circuit
Patent: 4,433,378 →
Application: 06/306,508 →
Three-Phase Regulated High-Voltage Charge Pump
Patent: 4,433,253 →
Application: 06/329,591 →
High-Speed Merged Plane Logic Function Array
Patent: 4,409,499 →
Application: 06/388,160 →
Video Address Generator and Timer for Creating a Flexible Crt Display
Patent: 4,404,554 →
Application: 06/440,598 →
Token Access Controller Protocol and Architecture
Patent: 4,590,468 →
Application: 06/474,135 →
High-Speed Merged Plane Logic Function Array
Patent: 4,516,040 →
Application: 06/502,724 →
Clock Generator
Patent: 4,547,684 →
Application: 06/525,286 →
Low Power Cmos Input Buffer Circuit
Patent: 4,555,642 →
Application: 06/534,783 →
Circuit to Prevent Pirating of an Mos Circuit
Patent: 4,583,011 →
Application: 06/547,639 →
Data Separator
Patent: 4,472,818 →
Application: 06/577,310 →
Switched Capacitor Filter
Patent: 4,538,113 →
Application: 06/597,264 →
Virtual Ground Read Only Memory
Patent: 4,638,459 →
Application: 06/696,591 →
Mos Monostable Multivibrator
Patent: 4,629,908 →
Application: 06/702,480 →
Video Dot Intensity Balancer
Patent: 4,719,456 →
Application: 06/709,438 →
Dual Edge Clock Address Mark Detector
Patent: 4,625,321 →
Application: 06/737,060 →
Local Area Network with Multiple Node Bus Topology
Patent: 4,775,864 →
Application: 06/894,035 →
Cascode Auto Bias Circuit
Patent: 4,697,153 →
Application: 06/908,651 →
Multilayer Metallization Method for Integrated Circuits
Patent: 4,824,803 →
Application: 07/064,501 →
Token-Passing Local Area Network with Improved Throughput
Patent: 4,866,706 →
Application: 07/089,976 →
Analog Floppy Disk Data Separator
Patent: 4,845,575 →
Application: 07/106,552 →
Method for Fabricating Self-Aligned, Conformal Metallization of Semi- Conductor Wafer
Patent: 4,764,484 →
Application: 07/107,572 →
Digital Data Separator
Patent: 4,796,280 →
Application: 07/118,235 →
Active Delay Line Circuit
Patent: 4,899,071 →
Application: 07/227,731 →
Process for Fabricating Self-Aligned Silicide Lightly Doped Drain Mos Devices
Patent: 4,908,326 →
Application: 07/291,492 →
Process for Fabricating Self-Aligned Silicide Lightly Doped Drain Mos Devices
Patent: 4,855,247 →
Application: 07/291,541 →
Method of Fabricating a Submicron Silicon Gate Mosfet Which Has a Self-Aligned Threshold Implant
Patent: 4,895,520 →
Application: 07/305,959 →
Method of Manufacturing Self-Aligned Conformal Metallization of Semiconductor Wafer by Selective Metal Deposition
Patent: 4,948,755 →
Application: 07/378,490 →
Method of Making Self-Aligned Tungsten Interconnection in an Integrated Circuit
Patent: 4,933,303 →
Application: 07/384,974 →
Four Transistor Static Ram Cell
Patent: 5,020,028 →
Application: 07/390,086 →
Local Area Network High Impedance Transceiver
Patent: 5,125,006 →
Application: 07/447,616 →
Two Parety Memory Access Arbitrator
Patent: 5,134,613 →
Application: 07/540,901 →
Current Averaging Data Separator
Patent: 5,170,297 →
Application: 07/553,735 →
Twinax Interface Circle
Application: 07/582,015 →
Noise Rejecting Ttl to Cmos Input Buffer
Patent: 5,079,439 →
Application: 07/655,178 →
Method and Apparatus for Controlling Data Communication Operations Within Stations of a Local-Area Network
Patent: 5,175,732 →
Application: 07/656,784 →
Method and Apparatus for Buffering Data Within Stations of a Communication Network
Patent: 5,313,582 →
Application: 07/693,637 →
Apparatus and Method to Prevent the Unsettling of a Quiescent, Low Output Channel Caused by Ground Bounce Induced by Neighboring Output Channels
Patent: 5,168,176 →
Application: 07/734,554 →
Apparatus and Method to Prevent the Disturbance of a Quiescent Output Buffer Caused by Ground Bounce or by Power Bounce Induced by Neighboring Active Output Buffers
Application: 07/734,752 →
Related Assignments (20)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignors Interest. Oct 1, 1980
From: RICHMAN PAUL
To: STANDARD MICROSYSTEMS CORPORATION
Reel/Frame 003820/0056 →
Assignment of Assignors Interest. Mar 19, 1981
From: HERMAN MORTON B.
To: STANDARD MICROSYSTEMS CORPORATION
Reel/Frame 003873/0341 →
Assignment of Assignors Interest. Jun 15, 1981
From: BURSTEIN STEVE; POPPER JAY
To: STANDARD MICROSYSTEMS CORPORATION, A CORP. OF DE
Reel/Frame 003863/0034 →
Assignment of Assignors Interest. Sep 28, 1981
From: LEGER, GEARY L.
To: WESTERN DIGITAL CORPORATION, A CORP. OF CA
Reel/Frame 003933/0579 →
Assignment of Assignors Interest. Dec 10, 1981
From: ZAPISEK, JOHN M.
To: STANDARD MICROSYSTEMS CORPORATION
Reel/Frame 003968/0230 →
Assignment of Assignors Interest. Jun 14, 1982
From: ZAPISEK, JOHN M.; GIULEKAS, GUS
To: STANDRD MICROSYSTEMS CORPORATION, 35 MARCUS BLVD., HAUPPAUGE, NEW YORK 11788
Reel/Frame 004008/0020 →
Assignment of Assignors Interest. Jan 17, 1983
From: NATIONAL SEMICONDUCTOR CORPORATION
To: STANDARD MICROSYSTEMS CORPORATION
Reel/Frame 004080/0144 →
Assignment of Assignors Interest. Mar 10, 1983
From: STIEGLITZ, MARK
To: WESTERN DIGITAL CORPORATION, A CORP. OF CA
Reel/Frame 004136/0039 →
Assignment of Assignors Interest. Sep 20, 1983
From: PECHAR, HENRY
To: STANDARD MICROSYSTEMS CORPORATION, A DE CORP.
Reel/Frame 004172/0826 →
Assignment of Assignors Interest. Sep 22, 1983
From: MORALES, LOUIS J.
To: STANDARD MICROSYSTEMS CORPORATION, A CORP OF DE
Reel/Frame 004178/0803 →
Assignment of Assignors Interest. Nov 1, 1983
From: PECHAR, HENRY
To: STANDARD MICROSYSTEMS, A CORP OF DE
Reel/Frame 004191/0905 →
Assignment of Assignors Interest. Apr 6, 1984
From: LISH, CHARLES A.
To: STANDARD MICROSYSTEMS, A DE CORP.
Reel/Frame 004247/0582 →
Assignment of Assignors Interest. Jan 31, 1985
From: PECHAR, HENRY W. JR; SPROCH, JAMES D.
To: STANDARD MICROSYSTEMS CORPORATION
Reel/Frame 004417/0026 →
Assignment of Assignors Interest. Feb 19, 1985
From: ETHE, RONALD S.; BURSTEIN, STEVEN
To: STANDARD MICROSYSTEMS CORPORATION A CORP
Reel/Frame 004419/0726 →
Assignment of Assignors Interest. Mar 8, 1985
From: SPROCH, JAMES D.; HERMAN, MORTON B.
To: STANDARD MICROSYSTEMS CORPORATION
Reel/Frame 004381/0072 →
Assignment of Assignors Interest. Jul 25, 1989
From: MO, ROY
To: STANDARD MICROSYSTEMS CORPORATION, 35 MARCUS BOULEVARD, HAUPPAUGE, NEW YORK 11788, A CORP. OF DE
Reel/Frame 005104/0806 →
Security Interest Nov 4, 1991
From: STANDARD MICROSYSTEMS CORPORATION, A CORPORATION OF DE
To: GREYHOUND FINANCIAL CORPORATION A DE CORPORATION
Reel/Frame 005906/0065 →
Assignment of Assignors Interest. Nov 4, 1991
From: WESTERN DIGITAL CORPORATION, A CORPORATION OF DE
To: STANDARD MICROSYSTEMS CORPORATION A CORPORATION OF DE
Reel/Frame 005906/0045 →
Security Interest Nov 8, 1991
From: WESTERN DIGITAL CORPORATION, A CORP. OF DE
To: BANK OF AMERICA NATIONAL TRUST AND SAVINGS ASSOCIATION
Reel/Frame 005926/0103 →
Release of Patent Security Agreement Jul 3, 2003
From: KAVLICO CORPORATION
To: STANDARD MEMS, INC.
Reel/Frame 014210/0141 →