IP Library Assignment 020403/0192
Patent Assignment
Reel/Frame 020403/0192

Assignment of Assignor's Interest

Recorded: 2007-11-29 Pages: 6
Assignor
AELUROS, INC.
Executed: 2007-11-29
Assignee
NETLOGIC MICROSYSTEMS, INC.
1875 CHARLESTON RD., MOUNTAIN VIEW, CALIFORNIA, 94043
Covered Properties (19)
Methods and Apparatus for Clock and Data Recovery Using Transmission Lines
Patent: 8,155,236 →
Application: 10/176,495 →
Activ Shunt-Peaked Logic Gates
Patent: 6,788,103 →
Application: 10/213,484 →
Methods and Apparatus for Injecting an External Clock into a Circuit
Patent: 7,005,885 →
Application: 10/370,833 →
Tuned Continuous Time Delay Fir Equalizer
Patent: 7,075,363 →
Application: 10/615,093 →
Methods and Apparatus for Improving Large Signal Performance for Active Shunt-Peaked Circuits
Patent: 7,009,425 →
Application: 10/778,635 →
Methods and Apparatus for Clock and Data Recovery Using a Single Source
Patent: 7,532,697 →
Application: 11/044,478 →
Methods and Apparatus for Frequency Synthesis with Feedback Interpolation
Patent: 7,432,750 →
Application: 11/296,786 →
Methods and Apparatus for Generating Multiple Clocks Using Feedback Interpolation
Patent: 7,323,916 →
Application: 11/321,412 →
Methods and Circuits for Driving Large Off-Chip Loads
Patent: 7,885,300 →
Application: 11/367,253 →
Low Power Serial Link
Patent: 8,000,412 →
Application: 11/756,139 →
Programmable Delay Clock Buffer
Patent: 7,849,348 →
Application: 11/781,712 →
Method and Apparatus for Shaping Electronic Pulses
Patent: 7,856,570 →
Application: 11/844,836 →
Methods and Apparatus for Minimizing Jitter in a Clock Synthesis Circuit That Uses Feedback Interpolation
Patent: 7,436,229 →
Application: 11/861,690 →
Publication: US 2008/0048734
Digital Linear Voltage Regulator
Patent: 7,679,345 →
Application: 11/869,595 →
Methods and Apparatus for Clock and Data Recovery Using Transmission Lines
Patent: 8,102,936 →
Application: 11/930,978 →
Publication: US 2008/0049850
Methods and Apparatus to Increase the Resolution of a Clock Synthesis Circuit That Uses Feedback Interpolation
Patent: 7,443,215 →
Application: 11/938,164 →
Circuits and techniques for driving large off-chip loads
Application: 60/658,468 →
Low power serial link
Application: 60/810,226 →
Programmable delay clock buffer
Application: 60/844,232 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 31, 2003
From: SIDIROPOULOS, STEFANOS; LIAW, HAW-JYH
To: AELUROS, INC.
Reel/Frame 014644/0358 →
Assignment of Assignor's Interest Oct 31, 2003
From: FELDMAN, ARNOLD R.; LOINAZ, MARC J.
To: AELUROS, INC.
Reel/Frame 014644/0362 →
Assignment of Assignor's Interest Oct 31, 2003
From: THON, LARS E.
To: AELUROS, INC.
Reel/Frame 014643/0978 →
Assignment of Assignor's Interest Oct 31, 2003
From: FELDMAN, ARNOLD R.
To: AELUROS, INC.
Reel/Frame 014644/0403 →
Assignment of Assignor's Interest Apr 12, 2004
From: LOINAZ, MARC; FEIDMAN, ARNOLD
To: AELUROS, INC.
Reel/Frame 015198/0384 →
Assignment of Assignor's Interest Mar 24, 2005
From: SIDIROPOULOS, STEFANOS; LOINAZ, MARC J.
To: AELUROS, INC.
Reel/Frame 016390/0948 →
Assignment of Assignor's Interest Apr 11, 2005
From: VERMA, SHWETABH; SIDIROPOULOS, STEFANOS; RABII, SHA
To: AELUROS, INC., A CALIFORNIA CORPORATION
Reel/Frame 016622/0635 →
Assignment of Assignor's Interest Mar 28, 2006
From: SIDIROPOULOS, STEFANOS; LOINAZ, MARC; NARAYANASWAMI, R. SEKHAR
To: AELUROS, INC.
Reel/Frame 017722/0989 →
Assignment of Assignor's Interest Mar 28, 2006
From: SIDIROPOULOS, STEFANOS; LOINAZ, MARC; NARAYANASWAMI, R. SEKHAR
To: AELUROS, INC.
Reel/Frame 018073/0266 →
Assignment of Assignor's Interest May 31, 2006
From: ACHARYA, NIKHIL; LIU, DEAN
To: AELUROS, INC., A CALIFORNIA CORPORATION
Reel/Frame 017941/0777 →
Assignment of Assignor's Interest Jun 2, 2006
From: ACHARYA, NIKHIL; LIU, DEAN
To: AELUROS, INC., A CALIFORNIA CORPORATION
Reel/Frame 017951/0784 →
Assignment of Assignor's Interest Aug 14, 2006
From: VERMA, SHWETABH; SIDIROPOULOS, STEFANOS; RABII, SHA
To: AELUROS, INC.
Reel/Frame 018177/0675 →
Assignment of Assignor's Interest Aug 14, 2006
From: LOINAZ, MARC J.
To: AELUROS, INC.
Reel/Frame 018158/0599 →
Assignment of Assignor's Interest May 31, 2007
From: LOINAZ, MARC J.
To: AELUROS, INC.
Reel/Frame 019362/0644 →
Assignment of Assignor's Interest Aug 24, 2007
From: LIAW, HAW-JYH; VERMA, SHWETABH
To: AELUROS, INC.
Reel/Frame 019743/0765 →
Assignment of Assignor's Interest Oct 9, 2007
From: VERMA, SHWETABH; LOINAZ, MARC J
To: AELUROS, INC.
Reel/Frame 019936/0324 →
Assignment of Assignor's Interest Nov 29, 2007
From: AELUROS, INC.
To: NETLOGIC MICROSYSTEMS, INC.
Reel/Frame 020174/0342 →
Assignment of Assignor's Interest Dec 20, 2007
From: SIDIROPOULOS, STEFANOS; STARK, DON
To: AELUROS, INC.
Reel/Frame 020280/0393 →
Security Agreement Jul 17, 2009
From: NETLOGIC MICROSYSTEMS, INC.; NETLOGIC MICROSYSTEMS INTERNATIONAL LIMITED; NETLOGIC MICROSYSTEMS CAYMANS LIMITED
To: SILICON VALLEY BANK
Reel/Frame 022973/0710 →
Release of Security Interest Aug 30, 2011
From: SILICON VALLEY BANK
To: NETLOGIC MICROSYSTEMS, INC.; NETLOGIC MICROSYSTEMS INTERNATIONAL LIMITED; NETLOGIC MICROSYSTEMS CAYMANS LIMITED
Reel/Frame 026830/0141 →
Assignment of Assignor's Interest Apr 16, 2015
From: NETLOGIC I LLC
To: BROADCOM CORPORATION
Reel/Frame 035443/0763 →
Change of Name Apr 16, 2015
From: NETLOGIC MICROSYSTEMS, INC.
To: NETLOGIC I LLC
Reel/Frame 035443/0824 →
Patent Security Agreement Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
Assignment of Assignor's Interest Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
Assignment of Assignor's Interest Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041708/0001 →