IP Library Assignment 023882/0159
Patent Assignment
Reel/Frame 023882/0159

Assignment of Assignor's Interest

Recorded: 2010-02-02 Pages: 12
Assignor
RENESAS TECHNOLOGY CORPORATION
Executed: 2009-12-17
Assignee
VACHELLIA, LLC
500 NEWPORT CENTER DRIVE, 7TH FLOOR, NEWPORT BEACH, CALIFORNIA, 92660
Covered Properties (48)
Dynamic Random Access Memory Having Stacked Capacitor Structure
Patent: 5,045,899 →
Application: 07/524,769 →
Process for Manufacturing Semiconductor Devices
Patent: 5,336,638 →
Application: 07/846,828 →
Clock Synchronous Semiconductor Memory Device
Patent: 5,521,878 →
Application: 08/305,522 →
Semiconductor Device Having Capacitor and Manufacturing Method Therefor
Patent: 5,523,596 →
Application: 08/403,614 →
Method of Manufacturing a Semiconductor Device Having a Capacitor
Patent: 5,683,929 →
Application: 08/467,641 →
Data Processor Having an Address Translation Buffer Operable with Variable Page Sizes
Patent: 5,796,978 →
Application: 08/524,561 →
Data Processor and Single-Chip Microcomputer with Changing Clock Frequency and Operating Voltage
Patent: 5,778,237 →
Application: 08/572,677 →
Semiconductor Memory Device Capable of High Speed Plural Parallel Test, Method of Data Writing Therefor and Parallel Tester
Patent: 5,717,652 →
Application: 08/589,358 →
Arrangement of Power Supply and Data Input/Output Pads in Semiconductor Memory Device
Patent: 5,604,710 →
Application: 08/616,734 →
Clock Synchronous Semiconductor Memory Device
Patent: 5,708,622 →
Application: 08/647,431 →
Semiconductor Device with Columns
Patent: 5,627,390 →
Application: 08/648,828 →
Translation Lookaside Buffer Supporting Multiple Page Sizes
Patent: 5,907,867 →
Application: 08/657,231 →
Data Processor with Functional Register and Data Processing Method
Patent: 5,701,425 →
Application: 08/704,362 →
Semiconductor Device with Storage Node
Patent: 5,780,888 →
Application: 08/758,841 →
Arrangement of Power Supply and Data Input/Output Pads in Semiconductor Memory Device
Patent: 5,838,627 →
Application: 08/768,090 →
Semiconductor Integrated Circuit Device Having Hierarchical Power Source Arrangement
Patent: 5,726,946 →
Application: 08/820,545 →
Clock Synchronous Semiconductor Memory Device
Patent: 5,835,448 →
Application: 08/880,153 →
Semiconductor Memory Device Capable of High Speed Plural Parallel Test
Patent: 6,122,190 →
Application: 08/942,691 →
Semiconductor Integrated Circuit Device Having Hierarchical Power Source Arrangement
Patent: 5,959,927 →
Application: 08/953,728 →
Data Processor for Implementing Virtual Pages Using a Cache and Register
Patent: 6,047,354 →
Application: 09/007,249 →
Multi-Bank Synchronous Semiconductor Memory Device
Patent: 5,959,930 →
Application: 09/030,001 →
Semiconductor Integrated Circuit Having Dram Mounted on Semiconductor Chip
Patent: 5,933,381 →
Application: 09/030,425 →
Semiconductor Device and Method of Manufacturing the Same
Patent: 6,150,688 →
Application: 09/038,981 →
Clock Synchronous Memory Embedded Semiconductor Integrated Circuit Device
Patent: 5,991,232 →
Application: 09/143,253 →
Dram Incorporating Self Refresh Control Circuit and System Lsi Including the Dram
Patent: 5,959,925 →
Application: 09/184,646 →
Memory Module System Having Multiple Memory Modules
Patent: 6,338,113 →
Application: 09/195,037 →
Microcomputer Having Data Execution Units Mounted Thereon
Patent: 6,304,958 →
Application: 09/210,886 →
Synchronous Semiconductor Memory Device Having Improved Operational Frequency Margin at Data Input/Output
Patent: 6,324,118 →
Application: 09/266,918 →
Semiconductor Integrated Circuit Device Having Hierarchical Power Source Arrangement
Patent: 6,134,171 →
Application: 09/317,860 →
Semiconductor Having Mechanism Capable of Operating at High Speed
Patent: 6,310,803 →
Application: 09/324,809 →
Semiconductor integrated circuit device having hierarchical power source arrangement
Patent: 6,246,625 →
Application: 09/497,199 →
Microcomputer Including Circuitry for Detecting an Unauthorized Stoppage of the System Clock Signal
Patent: 6,606,713 →
Application: 09/568,539 →
Semiconductor memory device capable of suppressing degradation in operation speed after replacement with redundant memory cell
Patent: 6,304,498 →
Application: 09/589,106 →
Parallel Tester Capable of High Speed Plural Parallel Test.
Patent: 6,301,166 →
Application: 09/624,601 →
High speed semiconductor memory device with short word line switching time
Patent: 6,366,507 →
Application: 09/653,900 →
Semiconductor device and method of manufacturing the same
Patent: 6,303,425 →
Application: 09/660,448 →
Semiconductor memory device with a plurality of memory blocks
Patent: 6,314,045 →
Application: 09/668,172 →
Synchronous semiconductor memory device having improved operational frequency margin at data input/output
Patent: 6,330,200 →
Application: 09/833,735 →
Publication: US 2001/0015927
Semiconductor integrated circuit device having hierarchical power source arrangement
Patent: 6,341,098 →
Application: 09/846,223 →
Publication: US 2001/0019502
Semiconductor device and method of manufacturing the same
Patent: 6,383,860 →
Application: 09/908,607 →
Publication: US 2001/0041438
Semiconductor Having Mechanism Capable of Operating at High Speed
Patent: 6,480,431 →
Application: 09/943,009 →
Publication: US 2002/0024858
Semiconductor Integrated Circuit Device Having Internal Synchronizing Circuit Responsive to Test Mode Signal
Patent: 6,462,996 →
Application: 09/943,011 →
Publication: US 2002/0024860
Synchronous Semiconductor Memory Device Having Improved Operational Frequency Margin at Data Input/Output
Patent: 6,522,598 →
Application: 09/986,111 →
Publication: US 2002/0039315
Clock Synchronizer with Offset Prevention Function Against Variation of Output Potential of Loop Filter
Patent: 6,812,754 →
Application: 10/030,687 →
High Speed Semiconductor Memory Device with Short Word Line Switching Time
Patent: 6,538,933 →
Application: 10/034,076 →
Publication: US 2002/0089881
Semiconductor Integrated Circuit Device Having Hierarchical Power Source Arrangement
Patent: 6,525,984 →
Application: 10/047,104 →
Publication: US 2002/0057618
Semiconductor Integrater Circuit Device Having Internal Synchonzing Circuit Responive to Test Mode Signal
Patent: 6,754,127 →
Application: 10/260,405 →
Publication: US 2003/0026119
Semiconductor Integrated Circuit Device Having Hierarchical Power Source Arrangement
Patent: 6,643,208 →
Application: 10/347,220 →
Publication: US 2003/0189869
Related Assignments (23)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignors Interest. Jun 6, 1990
From: ARIMOTO, KAZUTAMI
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 005328/0995 →
Assignment of Assignor's Interest Mar 2, 1994
From: SUZUKI, MASAYUKI; HARUTA, RYO; SHINRIKI, HIROSHI; NAKATA, MASAYUKI
To: HITACHI, LTD.
Reel/Frame 006887/0488 →
Assignment of Assignor's Interest Oct 31, 1994
From: OHTANI, JUN; YAMAZAKI, AKIRA; DOSAKA, KATSUMI
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 007194/0149 →
Assignment of Assignor's Interest Dec 14, 1995
From: YAMAMOTO, MITSUYOSHI; KAWASAKI, IKUYA; INAYOSHI, HIDEO; NARITA, SUSUMU
To: HITACHI, LTD.
Reel/Frame 007976/0345 →
Assignment of Assignor's Interest Apr 5, 1996
From: OOISHI, TSUKASA
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 007878/0296 →
Assignment of Assignor's Interest Apr 29, 1996
From: YOSHIOKA, SHINICHI; KAWASAKI, IKUYA; NARITA, SUSUMU; TAMAKI, SANEAKI
To: HITACHI, LTD.
Reel/Frame 007916/0829 →
Assignment of Assignor's Interest May 22, 1996
From: TOMISHIMA, SHIGEKI; ASAKURA, MIKIO; TSUKUDE, MASAKI; ARIMTO, KAZUTAMI
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 007950/0483 →
Assignment of Assignor's Interest Sep 19, 1996
From: SHINBO, TOSHINOBU; TACHIBANA, SUGURU; NARITA, SUSUMU; YOSHIOKA, SHINICHI
To: HITACHI, LTD.
Reel/Frame 008145/0123 →
Assignment of Assignor's Interest Jun 11, 1997
From: NAKAHARA, SHIGERU
To: HITACHI, LTD.
Reel/Frame 008551/0957 →
Assignment of Assignor's Interest Feb 25, 1998
From: IWATA, SHUNICHI
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 009002/0933 →
Assignment of Assignor's Interest Feb 25, 1998
From: SAKURAI, MIKIO
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 009033/0244 →
Assignment of Assignor's Interest Aug 28, 1998
From: MATSUMURA, MASASHI; YAMZAKI, AKIRA; HAYASHI, ISAMU; MANGYO, ATSUO
To: MITSUBISHI DENKI KABUSHIKI KAISHA; MITSUBISHI ELECTRIC ENGINEERING COMPANY LIMITED
Reel/Frame 009429/0742 →
Assignment of Assignor's Interest Nov 3, 1998
From: TATSUMI, TAKASHI
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 009576/0685 →
To Correct the Spelling of the Name of the Second Inventor Appearing at Reel 9429, Frame 0742. Jul 7, 1999
From: MATSUMURA, MASASHI; YAMAZAKI, AKIRA; HAYASHI, ISAMU; MANGYO, ATSUO
To: MITSUBISHI DENKI KABUSHIKI KAISHA; MITSUBISHI ELECTRIC ENGINEERING COMPANY LIMITED
Reel/Frame 010245/0192 →
Assignment of Assignor's Interest Dec 2, 2009
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 023594/0048 →
Assignment of Assignor's Interest Dec 8, 2009
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 023607/0855 →
Assignment of Assignor's Interest Jan 11, 2010
From: MITSUBISHI ELECTRIC ENGINEERING CO., LTD.
To: RENESAS DESIGN CORP.
Reel/Frame 023750/0953 →
Assignment of Assignor's Interest Feb 5, 2010
From: RENESAS DESIGN CORP.
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 023892/0916 →
Assignment of Assignor's Interest Sep 22, 2010
From: VACHELLIA, LLC
To: ADVANCED PROCESSOR TECHNOLOGIES, LLC
Reel/Frame 025026/0168 →
Change of Name Oct 8, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025114/0102 →
Assignment of Assignor's Interest Nov 13, 2010
From: RENASAS ELECTRONICS CORPORATION
To: DRAM MEMTECH LLC
Reel/Frame 025358/0749 →
Assignment of Assignor's Interest Jan 31, 2011
From: RENESAS ELECTRONICS CORPORATION
To: DRAM MEMTECH LLC
Reel/Frame 025723/0127 →
Assignment of Assignor's Interest Mar 5, 2011
From: DRAM MEMTECH LLC
To: DRAM MEMORY TECHNOLOGIES LLC
Reel/Frame 025904/0828 →