Patent Assignment
Reel/Frame 029034/0824
Assignment of Assignor's Interest
Recorded: 2012-09-27
Pages: 9
Assignor
INFINEON TECHNOLOGIES NORTH AMERICA CORP.
Executed: 2012-09-18
Assignee
INFINEON TECHNOLOGIES AG
AM CAMPEON 1-12, NEUBIBERG, D-85579, GERMANY
Covered Properties
(66)
Interrupt System with Fast Response Time
Patent:
5,968,159 →
Application:
08/927,993 →
Data Processing Unit, Microprocessor, and Method for Performing an Instruction
Patent:
6,961,846 →
Application:
08/928,427 →
Direct Memory Access Unit Having a Definable Plurality of Transfer Channels
Patent:
5,944,800 →
Application:
08/928,558 →
Method and Apparatus for Extracting Data Stored in Concatenated Registers
Patent:
6,052,522 →
Application:
08/961,384 →
Method and Apparatus for Performing Shift Operations on Packed Data
Patent:
6,098,087 →
Application:
09/065,759 →
Apparatus with Context Switching Capability
Patent:
6,378,065 →
Application:
09/069,030 →
Apparatus and Methods for Determining Rate of Transmitted Variable Rate Data
Patent:
6,424,631 →
Application:
09/097,255 →
Microcontroller with Flexible Interface to External Devices
Patent:
6,289,409 →
Application:
09/139,686 →
Processing Unit Having Independent Execution Units for Parallel Execution of Instructions of Different Category with Instruction Having Specific Bits Indicating Instrction Size and Category Respeectively
Patent:
6,292,845 →
Application:
09/140,474 →
Method and System for Reliably Indicating Test Results During a Self-Check Operation
Patent:
6,085,337 →
Application:
09/157,752 →
System and Method for Low Power Start-Up Circuit for Bandgap Voltage Reference
Patent:
6,084,388 →
Application:
09/163,739 →
Pipelined Arbitration System and Method
Patent:
6,167,478 →
Application:
09/167,652 →
Programmable Jtag Network Architecture to Support Proprietary Debug Protocol
Patent:
6,425,101 →
Application:
09/183,620 →
Data Processing Unit with Interface for Sharing Registers by a Processor and a Coprocessor
Data Processing Device with Memory Coupling Unit
Patent:
6,405,273 →
Application:
09/192,170 →
On-Chip Debug System with a Data Band Selector
Correlation Based Optical Ranging and Proximity Detector
Patent:
6,307,622 →
Application:
09/252,361 →
Optical System for Detecting Obstruction
Patent:
6,271,512 →
Application:
09/288,588 →
Pilot Aided Traffic Channel Estimation for Cdma Cellular Systems
Patent:
6,219,344 →
Application:
09/296,141 →
System and Method for Converting from Single-Ended to Differential Signals
Patent:
6,285,259 →
Application:
09/296,142 →
System and Method for Logarithmic Digital to Analog Conversion
Patent:
6,208,278 →
Application:
09/306,886 →
Forward Link Inter-Generation Soft Handoff Between 2G and 3G Cdma Systems
Tungsten-Filled Deep Trenches
Patent:
6,218,298 →
Application:
09/315,089 →
Integrated Circuits with Copper Metallization for Interconnections
Patent:
6,146,517 →
Application:
09/315,091 →
Prefetch Streaming Buffer
Patent:
6,694,423 →
Application:
09/320,336 →
Reducing Instruction Transactions in a Microprocessor
Patent:
6,393,551 →
Application:
09/320,827 →
Apparatus and Method for Aligning Variable-Width Instructions with a Prefetch Buffer
Patent:
6,981,127 →
Application:
09/320,833 →
Low-Noise Amplifier with Switched Gain and Method
Patent:
6,144,254 →
Application:
09/325,902 →
Low-Noise Mixer and Method
Patent:
6,529,721 →
Application:
09/325,903 →
Method and Apparatus for Performing an Interfrequency Search
Patent:
6,865,173 →
Application:
09/346,784 →
Trellis Code for Extended Partial Response Maximum Likelihood (Eprml) Channel
Patent:
6,408,419 →
Application:
09/347,598 →
Liquid Transfer Molding System for Encapsulating Semiconductor Integrated Circuits
Universal Two Dimensional (Frame and Line) Timing Generator
Patent:
6,784,929 →
Application:
09/378,183 →
Rule Based Ip Data Processing
Patent:
6,598,034 →
Application:
09/401,030 →
Linked List Dma Descriptor Architecture
Patent:
6,782,465 →
Application:
09/421,745 →
Semaphore Access in a Multiprocessor System
Patent:
6,549,961 →
Application:
09/429,502 →
Interface for a Memory Unit
Patent:
6,507,899 →
Application:
09/460,534 →
Survival Selection Rule
Patent:
6,415,415 →
Application:
09/465,521 →
Power Control During Inter-Generation Soft Handoffs
Patent:
6,584,087 →
Application:
09/473,777 →
Acquisition Signal Error Estimator
Patent:
6,469,851 →
Application:
09/480,314 →
Secure Asynchronous Clock Multiplexer
Patent:
6,535,048 →
Application:
09/499,879 →
Supporting ME2PRML and M2EPRML with the Same Trellis Structure
Patent:
6,680,980 →
Application:
09/503,534 →
Memory device with support for unaligned access
Patent:
6,256,253 →
Application:
09/507,568 →
Power Management and Control for a Microcontroller
Patent:
6,665,802 →
Application:
09/516,447 →
Same Single Board Computer System Operable as a System Master and a Bus Target
Patent:
6,769,035 →
Application:
09/545,469 →
Magneto-Resistive Asymmetry Compensation Loop
Patent:
6,587,292 →
Application:
09/546,796 →
Mismatching of Gratings to Achieve Phase Shift in an Optical Position Detector
Patent:
6,664,538 →
Application:
09/569,971 →
Acquisition Signal Error Estimator
Patent:
6,549,354 →
Application:
09/653,235 →
Integrated Voice-Over-Internet Protocol Processor
Patent:
7,400,617 →
Application:
09/660,882 →
Biasing circuits
Patent:
6,369,641 →
Application:
09/668,439 →
Phase Detecting with Parallel Discharge Paths
Patent:
6,690,209 →
Application:
09/675,998 →
Patterned Buried Insulator
Copper vias in low-k technology
Patent:
6,383,929 →
Application:
09/759,015 →
Chromium Adhesion Layer for Copper Vias in Low-K Technology
Memory Device with Support for Unaligned Access
Microcontroller with Flexible Interface to External Device
System and Method for Converting from Single- Ended to Differential Signals
Liquid Transfer Molding System for Encapsulating Semiconductor Integrated Circuits
Digital-To-Analog Converter with Constant Bias Voltage
Process for Forming Fusible Links
Output Controlled Line Driver with Programmable Common Mode Control
Patent:
6,504,397 →
Application:
09/949,260 →
System and Method for Converting from Single-Ended to Differential Signals
Low Error Propagation Rate 32/34 Trellis Code
Acquisition Signal Error Estimator
Forward Link Inter-Generation Soft Handoff Between 2G and 3G Cdma Systems
Patent:
6,804,519 →
Application:
10/402,041 →
Back End Interconnect with a Shaped Interface
Related Assignments
(17)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →
Assignment of Assignor's Interest
Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
Change of Name
Sep 25, 2012
From: INFINEON TECHNOLOGIES CORPORATION
To: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
Reel/Frame 029033/0693 →
Patent Security Agreement
May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
Change of Name
Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
Assignment of Assignor's Interest
Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
Change of Name
Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
Termination and Release of Security Interest in Patent Rights (Releases Rf 032856-0031)
Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
Patent Security Agreement
Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
Termination and Release of Security Interest in Patents
Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
Assignment of Assignor's Interest
Sep 24, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047022/0620 →
Corrective Assignment to Correct the Nature of Conveyance and Effective Date Previously Recorded on Reel 047022 Frame 0620. Assignor(S) Hereby Confirms the Merger.
Oct 2, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047185/0643 →
Merger
Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0026 →
Corrective Assignment to Correct the Effective Date Previously Recorded on Reel 047185 Frame 0643. Assignor(S) Hereby Confirms the Merger.
Oct 26, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047476/0845 →
Corrective Assignment to Correct the Effective Date of Merger Previously Recorded at Reel: 047185 Frame: 0643. Assignor(S) Hereby Confirms the Corrective Merger.
Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047959/0296 →
Corrective Assignment to Correct the Effective Date of Merger Previously Recorded on Reel 047195 Frame 0026. Assignor(S) Hereby Confirms the Merger.
Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047477/0423 →
Assignment of Assignor's Interest
Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →