IP Library › Assignment 047185/0643
Patent Assignment
Reel/Frame 047185/0643

Corrective Assignment to Correct the Nature of Conveyance and Effective Date Previously Recorded on Reel 047022 Frame 0620. Assignor(S) Hereby Confirms the Merger.

Recorded: 2018-10-02 Pages: 47
Assignor
Assignee
AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
1 YISHUN AVENUE 7, SINGAPORE, 768923, SINGAPORE
Covered Properties (788)
Handover Method for Mobile Wireless Station
Patent: 6,278,877 →
Application: 08/065,328 →
Multi-Level, Hierarchical Radio-Frequency Communication System
Patent: 6,006,100 →
Application: 08/239,267 →
Substrate Based Array Connector
Patent: 6,254,280 →
Application: 08/391,817 →
"Infrared Backbone Communication Network Having a Radio Frequency Backup Channel"
Patent: 5,880,867 →
Application: 08/737,978 →
System and Method for Improving Convergence During Modem Training and Reducing Computational Load During Steady-State Modem Operations
Patent: 5,864,545 →
Application: 08/761,405 →
Method and Apparatus for Encoding Video Color Information
Patent: 6,124,899 →
Application: 08/761,642 →
Method and Apparatus for a Fault Tolerant, Software Transparent and High Data Integrity Extension to a Backplane Bus or Interconnect
Patent: 6,091,705 →
Application: 08/771,581 →
Communication Network Having an Dormant Polling Protocol
Patent: 5,896,561 →
Application: 08/773,477 →
Antenna Cap for Computer Device Utilizing a Radio Card
Patent: 5,870,279 →
Application: 08/775,391 →
Communication Network Providing Wireless and Hard-Wired Dynamic Routing
Patent: 5,748,619 →
Application: 08/780,124 →
Fibre Channel Learning Bridge, Learning Half Bridge, and Protocol
Patent: 5,978,379 →
Application: 08/786,891 →
Analog-To-Digital Converter with Improved Cell Mismatch Compensation
Patent: 5,835,048 →
Application: 08/792,941 →
Multiple Frequency Rf Transceiver
Patent: 5,878,332 →
Application: 08/797,228 →
Low Voltage Input Buffer
Patent: 5,869,985 →
Application: 08/797,495 →
Trellis Coding System for Disc Storage Systems
Patent: 6,032,284 →
Application: 08/815,881 →
Wide Band-Width Operational Amplifier
Patent: 5,880,634 →
Application: 08/822,988 →
Compensation Technique for Parasitic Capacitance
Patent: 5,744,385 →
Application: 08/822,989 →
A Pll- Based Differential Tuner Circuit
Patent: 5,936,445 →
Application: 08/822,990 →
Adaptive Power Leveling of an Rf Transceiver Utilizing Information Stored in Non-Volatile Memory
Patent: 6,009,119 →
Application: 08/823,611 →
Hierarchical Storage Management from a Mirrored File System on a Storage Network Segmented by a Bridge
Patent: 6,000,020 →
Application: 08/825,683 →
Windowed Digital Matched Filter Circuit for Power Reduction in Battery-Powered Cdma Radios
Patent: 6,075,807 →
Application: 08/826,347 →
Multiple-Rate Direct Sequence Architecture Utilizing a Fixed Chipping Rate and Variable Spreading Code Lengths
Patent: 5,946,344 →
Application: 08/826,777 →
Portable Work Station and Data Collection Terminal Including Switchable Multi Purpose Touch Screen Display
Patent: 5,850,358 →
Application: 08/831,035 →
Method and Apparatus for Monitoring Frequency Synthesizer Locking Time
Patent: 5,982,812 →
Application: 08/856,257 →
Disk Storage System Employing Error Detection and Correction of Channel Coded Data, Interpolated Timing Recovery, and Retroactive/Split-Segment Symbol Synchronization
Patent: 6,009,549 →
Application: 08/856,885 →
Content Addressable Memory Multiple Match Detection Circuit
Patent: 5,852,569 →
Application: 08/858,997 →
PR4 Equalization and an EPR4 Remod/Demod Sequence Detector in a Sampled Amplitude Read Channel
Patent: 5,961,658 →
Application: 08/862,492 →
Sampled Amplitude Read Channel Employing a Remod/Demod Sequence Detector Guided by an Error Syndrome
Patent: 5,926,490 →
Application: 08/862,493 →
Priority Encoder for a Content Addressable Memory System
Patent: 5,964,857 →
Application: 08/865,819 →
Local Area Network Having Multiple Channel Wireless Access
Patent: 5,960,344 →
Application: 08/878,357 →
Method and Apparatus for Dual Issue of Program Instructions to Symmetric Multifunctional Execution Units
Patent: 6,035,388 →
Application: 08/883,147 →
Semiconductor Memory Device for Mass Storage Block Access Applications
Patent: 5,864,568 →
Application: 08/885,320 →
Differential Dynamic Content Addressable Memory and High Speed Network Address Filtering
Patent: 5,949,696 →
Application: 08/885,909 →
Broadband Multiple Element Antenna System
Patent: 6,281,850 →
Application: 08/888,660 →
Read/Write Channel Write Precompensation System and Method Using One or More Delay Clocks
Patent: 5,986,830 →
Application: 08/902,832 →
Concurrent Multiple Data Rate Communications in a Wireless Local Area Network
Patent: 5,912,921 →
Application: 08/915,260 →
Home Area Network System and Method
Patent: 6,069,899 →
Application: 08/924,449 →
A Writeback Cache Cell with a Dual Ported Dirty Bit Cell and Method for Operating Such a Cache Cell
Patent: 6,055,606 →
Application: 08/924,604 →
Analog to Digital Converter
Patent: 6,014,098 →
Application: 08/932,163 →
Filter with Manually Operable Signal Carrier Guides
Patent: 6,127,903 →
Application: 08/947,220 →
Variable Rate Modulator
Patent: 6,144,712 →
Application: 08/948,101 →
Asynchronous Transfer Mode Switching Architectures Having Connection Buffers
Patent: 6,069,893 →
Application: 08/959,056 →
Network Protocol- Based Home Entertainment Network
Patent: 6,026,150 →
Application: 08/960,842 →
Switched Gain Antenna for Enhanced System Performance
Patent: 6,005,530 →
Application: 08/961,959 →
Method and Apparatus for Position Independent Reconfiguration in a Network of Multiple Context Processing Elements
Patent: 6,108,760 →
Application: 08/962,187 →
Method and Apparatus for Retiming in a Network of Multiple Context Processing Elements
Patent: 6,122,719 →
Application: 08/962,526 →
Apparatus for, and Method of, Processing Signals Transmitted Over a Local Area Network
Patent: 6,178,198 →
Application: 08/970,557 →
Method and Apparatus for Controlling Country Specific Frequency Allocation
Patent: 5,940,509 →
Application: 08/972,905 →
Cache Memory Cell with a Pre-Programmed State
Patent: 6,070,229 →
Application: 08/982,822 →
Shielded Fiber Optic Connector
Patent: 5,960,136 →
Application: 08/986,438 →
Polarization-Controlled Vcsels Using Externally Applied Uniaxial Stress
Patent: 6,188,711 →
Application: 08/993,006 →
Optical Head Structures Including Electronic Devices Adjacent Transparent Substrates and Related Methods
Patent: 5,872,762 →
Application: 08/994,205 →
Optical Head Structures Including Support Substrates Adjacent Transparent Substrates and Related Methods
Patent: 5,886,971 →
Application: 08/994,281 →
Low Voltage Transmission Line Driver
Patent: 6,028,479 →
Application: 09/004,628 →
Layout Architecture for Core I/O Buffer
Patent: 6,114,903 →
Application: 09/007,258 →
Parity Channel Code for Enhancing the Operation of a Remod/Demod Sequence Detector in a D=1 Sampled Amplitude Read Channel
Patent: 6,052,248 →
Application: 09/016,004 →
N-Drive or P-Drive Vcsel Array
Patent: 6,069,908 →
Application: 09/020,724 →
Optical Circulator
Patent: 6,088,491 →
Application: 09/023,858 →
Delay Line Ramp Demodulator
Patent: 5,990,733 →
Application: 09/026,062 →
Organic Low-Dielectric Constant Films Deposited by Plasma Enhanced Chemical Vapor Deposition
Patent: 6,083,572 →
Application: 09/031,865 →
Apparatus for, and Method of, Reducing Noise in a Communications System
Patent: 6,236,645 →
Application: 09/037,328 →
System and Method for Establishing Unique Sequence Identification in an Information Exchange of a System Network
Patent: 6,163,540 →
Application: 09/040,086 →
Wavelength-Division-Multiplexing Programmable Add/Drop Using Interleave-Chirped Waveguide Grating Router
Patent: 6,141,467 →
Application: 09/040,781 →
Differential Optical Signal Receiver
Patent: 6,175,438 →
Application: 09/040,885 →
Phase Shifter Circuit with High Line Arity
Patent: 5,990,761 →
Application: 09/044,407 →
Three Port Optical Filter
Patent: 6,125,221 →
Application: 09/044,505 →
Fabricating Optical Elements Using a Photoresist Formed from Contact Printing of a Gray Level Mask
Patent: 6,071,652 →
Application: 09/044,864 →
Robust Interface for High Speed Memory Access
Patent: 6,092,167 →
Application: 09/045,256 →
Planar Lightguide Circuit Having a Planar Grating
Patent: 6,175,670 →
Application: 09/046,335 →
Method and Apparatus for Transporting Laser Bars
Patent: 6,045,321 →
Application: 09/046,409 →
Output Drive Circuit Tolerant of Higher Voltage Signals
Patent: 6,018,257 →
Application: 09/046,781 →
Rotatable Cylindrical Elements for Optical Alignment
Patent: 5,973,860 →
Application: 09/047,553 →
System and Method for Coordinating Competing Register Accesses by Multiple Buses
Patent: 6,115,770 →
Application: 09/047,772 →
Voltage Translating Buffer Based on Low Voltage Technology
Patent: 6,064,229 →
Application: 09/048,382 →
Testing Method and Apparatus for First-in First-Out Memories
Patent: 6,108,802 →
Application: 09/048,537 →
An Add Compare Select Circuit and Method Implementing a Viterbi Algorithm
Patent: 6,148,431 →
Application: 09/049,158 →
Wavelength Demultiplexing Stack Photodiode Detector with Electrical Isolation Layers
Patent: 6,271,943 →
Application: 09/049,252 →
Memory Controller with Error Correction Memory Test Application
Patent: 5,959,914 →
Application: 09/049,316 →
Device and Method for Efficient Decoding with Time Reversed Data
Patent: 6,272,187 →
Application: 09/049,412 →
Priority Arbiter with Shifting Sequential Priority Scheme
Patent: 6,073,132 →
Application: 09/049,500 →
Refresh Sampling Built-in Self Test and Repair Circuit
Patent: 5,909,404 →
Application: 09/049,852 →
System and Method for Rapidly Decoding Sub-Pictures in a Dvd Player
Patent: 6,249,640 →
Application: 09/049,890 →
Embedded Dram with Noise-Protecting Substrate Isolation Well
Patent: 5,999,440 →
Application: 09/050,674 →
Low Leakage Tristatable Mos Output Driver
Patent: 6,107,829 →
Application: 09/052,074 →
Mbedded Dram with Noise Protecting Shielding Conductor
Patent: 5,973,952 →
Application: 09/052,273 →
Dram with Built-in Noise Protection
Patent: 6,180,998 →
Application: 09/052,274 →
Embedded Dram with Noise-Protected Differential Capacitor Memory Cells
Patent: 6,064,588 →
Application: 09/052,279 →
System for Modular State Machine with Reduced Circuitry Due to Reduced Level of Repetition of the Same Sequences of States
Patent: 6,119,182 →
Application: 09/052,713 →
Method and System for Converting Computer Peripheral Equipment to Scsi-Compliant Devices
Patent: 6,115,771 →
Application: 09/052,715 →
Method for Adaptively Controlling Amplifier Linearization Devices
Patent: 6,160,996 →
Application: 09/052,833 →
Low Latency Correlation
Patent: 6,097,851 →
Application: 09/052,852 →
Method and Apparatus for Arbitrating Access to Multiple Buses in a Data Processing System
Patent: 6,260,093 →
Application: 09/052,853 →
Hardware Assisted Mask Read/Write
Patent: 6,170,034 →
Application: 09/052,854 →
Apparatus, and Associated Method, for Generating Multi-Bit Length Sequences
Patent: 6,131,108 →
Application: 09/052,890 →
Block Coding Method and System for Failure Recovery in Disk Arrays
Patent: 6,138,125 →
Application: 09/052,894 →
Optical Module with Stress Compensated Ferrule-Clip Assembly
Patent: 5,963,695 →
Application: 09/053,264 →
Low Latency Architecture for Spatial Filtration
Patent: 6,047,091 →
Application: 09/053,278 →
Spatial Filter for Surface Texture Navigation
Patent: 6,049,338 →
Application: 09/053,294 →
Method for Laser Bar Facet Coating
Patent: 6,026,557 →
Application: 09/054,138 →
Phase Detector
Patent: 6,075,387 →
Application: 09/054,591 →
List Viterbi Algorithms for Tailbiting Convolutional Codes
Patent: 6,161,210 →
Application: 09/054,676 →
Single Chip Protocol Engine and Data Formatter Apparatus for Off Chip Host Memory to Local Memory Transfer and Conversion
Patent: 6,185,620 →
Application: 09/054,849 →
Method and Apparatus for Managing Access to a Loop in a Data Processing System
Patent: 6,134,617 →
Application: 09/054,850 →
Covariant Optical Module
Patent: 6,056,447 →
Application: 09/055,627 →
Scalable Overflow Clamp and Method for a Digital Gain Scaler/Summer
Patent: 6,115,731 →
Application: 09/056,722 →
Near Nyquist Rate Variable Rate Receiver
Patent: 6,066,980 →
Application: 09/057,104 →
Method and System Which Permits Logic Signal Routing Over on-Chip Memories
Patent: 6,018,480 →
Application: 09/057,188 →
Monolithic Filters Utilizing Thin Film Bulk Acoustic Wave Devices and Minimum Passive Components for Controlling the Shape and Width of a Passband Response
Patent: 6,081,171 →
Application: 09/057,299 →
Rate 16/17 (0,5) Modulation Code Apparatus and Method for Partial Response Magnetic Recording Channels
Patent: 6,046,691 →
Application: 09/059,061 →
Charge Pump for Phase Locked Loop Including Main and Auxiliary Pump Circuits
Patent: 6,043,716 →
Application: 09/059,243 →
Video Encoder Having Reduced Memory Bandwidth Requirements
Patent: 6,163,576 →
Application: 09/059,247 →
System Bus Arbitrator for Facilitating Multiple Transactions in a Computer System
Patent: 6,085,271 →
Application: 09/059,615 →
Optical Assembly with Improved Dimensional Stability
Patent: 6,205,264 →
Application: 09/059,858 →
Fully Integrated Phase-Locked Loop with Resistor-Less Loop Filter
Patent: 6,157,691 →
Application: 09/059,943 →
Asynchronous Transfer Mode Traffic Shapers
Patent: 6,198,723 →
Application: 09/060,228 →
Conferencing with a Calling Party
Patent: 6,269,159 →
Application: 09/060,373 →
Method for Preventing Facet Coating Overspray
Patent: 5,989,637 →
Application: 09/061,410 →
Device and Method for Characterizing Signal Skew
Patent: 5,991,890 →
Application: 09/061,435 →
Moving Mirror Switch
Patent: 6,031,946 →
Application: 09/061,437 →
System and Method for Adaptive Equalization of a Waveform Independent of Absolute Waveform Peak Value
Patent: 6,188,721 →
Application: 09/061,937 →
Integrated Circuit I/O Buffer Having Pass Gate Protection with Rc Delay
Patent: 6,118,303 →
Application: 09/061,972 →
System and Method for Compensating for Baseline Wander
Patent: 6,148,025 →
Application: 09/062,342 →
Rf Power Transistor Control Using Collector Current
Patent: 5,955,927 →
Application: 09/063,229 →
Chirped Waveguide Grating Router as a Splitter/Router
Patent: 6,163,637 →
Application: 09/063,469 →
Dynamic Control for Laser Diode Drivers
Patent: 6,021,143 →
Application: 09/064,121 →
Method for Compensating Stress Induced in an Optical Component
Patent: 6,218,641 →
Application: 09/064,281 →
Apparatus and Method for Recovering Information Bits from a 64/256-Quadrature Amplitude Modulation Treliss Coded Modulation Decoder
Patent: 6,233,712 →
Application: 09/065,751 →
64/256 Quadrature Amplitude Modulation Trellis Coded Modulation Decoder
Patent: 6,269,129 →
Application: 09/066,048 →
High Speed, Fine-Resolution Gain Programmable Amplifier
Patent: 5,999,052 →
Application: 09/067,440 →
Cmos Reference Voltage Generator
Patent: 5,963,083 →
Application: 09/067,818 →
Cmos High Voltage Drive Output Buffer
Patent: 6,014,039 →
Application: 09/067,936 →
Cmos Output Buffer Protection Circuit
Patent: 5,952,866 →
Application: 09/069,049 →
Cmos Input Buffer Protection Circuit
Patent: 6,064,231 →
Application: 09/069,062 →
Modulator for Analog Applications
Patent: 6,310,902 →
Application: 09/069,109 →
Article Comprising a Standoff Compliant Metallization and a Method for Making Same
Patent: 6,184,582 →
Application: 09/069,396 →
Voltage Regulator and Method of Voltage Regulation
Patent: 6,104,176 →
Application: 09/069,733 →
Punctured Maximum Transition Run Code, Apparatus and Method for Providing the Same
Patent: 6,097,321 →
Application: 09/069,822 →
Adaptive Digital Clock Recovery
Patent: 6,252,850 →
Application: 09/071,269 →
Laser Diode with Substrate-Side Protection
Patent: 6,013,540 →
Application: 09/071,503 →
Laser Bar Cleaving Apparatus
Patent: 6,048,747 →
Application: 09/071,629 →
Sampled Amplitude Read Channel Employing Early-Decisions from a Trellis Sequence Detector for Sampling Value Estimation
Patent: 6,246,723 →
Application: 09/072,285 →
Network Utilizing Modified Preambles That Support Antenna Diversity
Patent: 6,018,555 →
Application: 09/073,035 →
Implementation of Configurable on-Chip Fast Memory Using the Data Cache Ram
Patent: 6,092,159 →
Application: 09/073,047 →
Micro-Mechanical, Anti-Reflection, Switched Optical Modulator Array and Fabrication Method
Patent: 5,943,158 →
Application: 09/073,052 →
Power Saving Arrangement for a Flash a/D Converter
Patent: 6,081,219 →
Application: 09/073,150 →
Digital Oscillator for Generating Two Fixed Pulse Signals from One Clock
Patent: 6,084,442 →
Application: 09/073,285 →
Cruciform Cylindrical Lens for Elliptical Beam Transformation
Patent: 5,973,853 →
Application: 09/073,544 →
Method of Controlling Repetitive Reading of Gruop of Pictures (Gop) Data from a Storage Medium, and an Apparatus Therefore
Patent: 6,278,835 →
Application: 09/073,719 →
Apparatus and Method for Synchronizing an Scdma Upstream or Any Other Type Upstream to an Mcns Downstream or Any Other Type Downstream with a Different Clock Rate Than the Upstream
Patent: 6,243,369 →
Application: 09/074,036 →
Method and Apparatus for Aiming a Spray Etcher Nozzle
Patent: 5,993,681 →
Application: 09/074,668 →
Single-Cycle Accelerator for Extremum State Search
Patent: 6,272,188 →
Application: 09/074,669 →
Circuit and Method for Providing a Generally Log Logarithmic Transfer Function
Patent: 5,977,812 →
Application: 09/074,836 →
Differential Amplifier
Patent: 6,121,836 →
Application: 09/074,887 →
Method and Apparatus for Configuring Arbitrary Sized Data Paths Comprising Multiple Context Processing Elements
Patent: 6,226,735 →
Application: 09/075,412 →
Implementation of a Divide Algorithm for Buffer Credit Calculation in a High Speed Serial Channel
Patent: 6,289,386 →
Application: 09/075,710 →
Memory Bank Organization Correlating Distance with a Memory Map
Patent: 6,226,726 →
Application: 09/075,946 →
Active Termination of a Conductor for Bi-Directional Signal Transmission
Patent: 6,051,989 →
Application: 09/076,212 →
Area Array (Flip Chip) Probe Card
Patent: 6,130,546 →
Application: 09/076,312 →
Method and Apparatus for Implementing a Learn Instruction in a Depth Cascaded Content Addressable Memory System
Patent: 6,240,485 →
Application: 09/076,336 →
Method and Apparatus for Implementing a Learn Instruction in a Content Addressable Memory Device
Patent: 6,219,748 →
Application: 09/076,337 →
Multimode Communications Systems
Patent: 6,304,352 →
Application: 09/076,644 →
Minimum Refractory Period in a Multiple Agent Resource Sharing Environment
Patent: 6,163,831 →
Application: 09/076,735 →
Multi-Mode Variable Rate Digital Cable Receiver
Patent: 6,304,621 →
Application: 09/078,102 →
Selectable Power Supply Lines for Isolating Defects in Integrated Circuits
Patent: 6,043,672 →
Application: 09/078,188 →
Startup Protocol for High Throughput Communications Systems
Patent: 6,201,796 →
Application: 09/078,466 →
Wavelength-Selectable Fiber Ring Laser
Patent: 6,134,250 →
Application: 09/078,808 →
Startup Protocol for High Throughput Communications Systems
Patent: 6,212,225 →
Application: 09/078,993 →
High Speed Comparator with Bit-Wise Masking
Patent: 5,977,864 →
Application: 09/079,641 →
Efficient Use of Inverting Cells in Multiplier Converter
Patent: 6,122,655 →
Application: 09/079,642 →
Guiding Filters for Wavelingth Division Multiplexing in Soliton Transmission
Patent: 6,147,788 →
Application: 09/080,551 →
Anvil Pad Configuration for Laser Cleaving
Patent: 6,247,625 →
Application: 09/080,648 →
Incrementally Continuous Laser Cleaving Process
Patent: 6,098,862 →
Application: 09/080,663 →
Method of Aligning Optical Fibers to a Multi-Port Optical Assembly
Patent: 6,118,910 →
Application: 09/081,877 →
Split Reciprocal Polarization Switch
Patent: 5,930,028 →
Application: 09/082,828 →
Method of Making a Semiconductor Device Having a Non-Alloyed Ohmic Contact to a Buried Doped Layer
Patent: 6,258,616 →
Application: 09/083,165 →
Electronically Controlled Variable Attenuator
Patent: 6,081,151 →
Application: 09/083,166 →
Edge Receptive Photodetector Devices
Patent: 6,064,782 →
Application: 09/083,496 →
Method and Apparatus for Modulation Encoding Data for Storage on a Multi-Level Optical Recording Medium
Patent: 6,148,428 →
Application: 09/083,699 →
Technique for Detecting and Treating Robbed Bit Signaling in Data Communicatons
Patent: 6,266,382 →
Application: 09/084,160 →
High Speed Flip-Chip Dispensing
Patent: 5,966,903 →
Application: 09/085,643 →
Digital Frequency Generation Method and Apparatus
Patent: 6,281,759 →
Application: 09/085,774 →
Low Impact Signal Buffering in Integrated Circuits
Patent: 6,184,711 →
Application: 09/086,184 →
Active Substrate Noise Injection Cancellation
Patent: 6,040,728 →
Application: 09/086,842 →
Wide-Common Mode Differential Receiver with Precision Input Referred Offset
Patent: 6,111,437 →
Application: 09/087,297 →
Low Power, High Voltage-Tolerant Bus Holder Circuit in Low Voltage Technology
Patent: 5,973,530 →
Application: 09/087,303 →
Encoding and Decoding Rate-1/N Convolutional Codes and Their Punctured Versions
Patent: 6,134,696 →
Application: 09/087,459 →
Asymmetrical Current Steering Output Driver with Compact Dimensions
Patent: 6,294,947 →
Application: 09/087,538 →
Transaction Control Circuit for Synchronizing Transactions Across Asynchronous Clock Domains
Patent: 6,087,867 →
Application: 09/087,673 →
Multi-Bus Multi-Data Transfer Protocols Controlled by a Bus Arbiter Coupled to a Crc Signature Compactor
Patent: 6,105,154 →
Application: 09/087,837 →
Micro-Opto-Electromechanical Devices and Method Therefor
Patent: 5,995,688 →
Application: 09/088,182 →
Digital Interpolating System and Method
Patent: 6,163,786 →
Application: 09/088,855 →
Sbar Structures and Method of Fabrication of Sbar.Fbar Film Processing Techniques for the Manufacturing of Sbar/Bar Filters
Patent: 6,060,818 →
Application: 09/088,964 →
Asynchronous Data Conversion Circuit
Patent: 6,301,264 →
Application: 09/089,006 →
Method for Making Multiple Wavelength Semiconductor Lasers on a Single Wafer
Patent: 6,033,926 →
Application: 09/090,366 →
Data Communication Circuit and Method for Buffering Data Between a Shared Resource and Multiple Interfaces
Patent: 6,105,086 →
Application: 09/090,467 →
Packet Switching Fabric Using the Segmented Ring with Resource Reservation Control
Patent: 6,246,692 →
Application: 09/092,350 →
Modified Chemical Vapor Deposition Using Independently Controlled Thermal Sources
Patent: 6,145,345 →
Application: 09/092,380 →
Balanced Differential Amplifier Without Common-Mode Feedback Circuit
Patent: 6,160,446 →
Application: 09/092,404 →
Article Comprising a Dispersive Waveguide Tap
Patent: 6,122,422 →
Application: 09/093,323 →
New Trellis Code Modulation Decoder Structure for Advanced Digital Television Receiver
Patent: 6,201,563 →
Application: 09/093,362 →
Transmission System Having Adjustable Output Signal Levels Utilizing Transistors Selectable Between Open and Closed States in Accordance with Control Input State
Patent: 6,125,415 →
Application: 09/095,180 →
Current Mode Ethernet Transmitter
Patent: 6,154,784 →
Application: 09/095,183 →
Patterned Light Emitting Diode Devices
Patent: 6,252,253 →
Application: 09/095,236 →
Enhanced Echo Canceler
Patent: 6,240,128 →
Application: 09/096,425 →
Feedback Circuit to Comprensate for Process and Power Supply Variations
Patent: 5,949,228 →
Application: 09/096,685 →
Method and Apparatus for Characterizing Phase Noise and Timing Jitter in Oscillators
Patent: 6,167,359 →
Application: 09/096,856 →
Optical Adapter Including a Ferrule Assembly
Patent: 6,102,581 →
Application: 09/097,620 →
Process for Fabricating an Optical Waveguide
Patent: 6,261,857 →
Application: 09/097,924 →
Integrated Circuit I/O Buffer with 5V Well and Passive Gate Voltage
Patent: 6,130,556 →
Application: 09/098,099 →
Optical Air-Gap Attenuator
Patent: 6,104,856 →
Application: 09/098,276 →
Technique for Designing an Amplifier Circuit in an Integrated Circuit Device
Patent: 6,094,098 →
Application: 09/098,971 →
Method and Apparatus for Extending the Spurious Free Dynamic Range of a Digital-to-Analog Converter
Patent: 6,198,419 →
Application: 09/099,027 →
Method and Apparatus for Executing Multiple Instruction Streams in a Digital Processor with Multiple Data Paths
Patent: 6,272,616 →
Application: 09/099,192 →
Multiple Channel Data Communication Buffer with Separate Single Port Transmit and Receive Memories Having a Unique Channel for Each Communication Port and with Fixed Arbitration
Patent: 6,122,680 →
Application: 09/099,550 →
Multiple Channel Data Communication Buffer with Single Transmit and Receive Memories
Patent: 6,226,338 →
Application: 09/099,563 →
Non-Volatile Storage Element and Method for Manufacturing Using Standard Processing
Patent: 6,052,304 →
Application: 09/099,574 →
System for Negotiating Access to a Shared Resource by Arbitration Logic in a Shared Resource Negotiator
Patent: 6,279,066 →
Application: 09/099,778 →
Optical Time-Division-Multiplex System
Patent: 6,226,112 →
Application: 09/099,788 →
Ram Address Decoding System and Method to Support Misaligned Memory Access
Patent: 6,076,136 →
Application: 09/099,885 →
User Programmable Station Set Bass and Treble Control
Patent: 6,263,074 →
Application: 09/100,067 →
Double Transistor Switch for Supplying Multiple Voltages to Flash Memory Wordlines
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Multi-Port Optical Circulator Utilizing Imaging Lens and Correction Optical Element
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Vertical Filter Architecture Using Interleaved Memory for Storage of Pixel Data
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Field-Based Upsampling Method for Performing Zoom in a Digital Video System
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Wafer Having Top and Bottom Emitting Vertical-Cavity Lasers
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Audio Decoder Bypass Module for Communicating Compressed Audio to External Components
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Source Impedance Matching in an Anolog-to-Digital Converter
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Arithmetic Logic Unit Controller for Linear Pcm Scaling and Decimation in an Audio Decoder
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Lateral Mode Suppression in Semiconductor Bulk Acoustic Resonator (Sbar) Devices Using Tapered Electrodes, and Electrodes Edge Damping Materials
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Inherently Compensated Clocking Circuit for Dynamic Random Access Memory
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Audio/Video Device Including an Infrared Transceiver for Transmitting and Receiving Configuration Data, and Method for Configuring Same
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Power Reduction in a Multiprocessor Digital Signal Processor Based on Processor Load
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Programmable Filter Bank Having Notch and Bandpass Filter Frequency Responses
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A Pointer Register Indirectly Addressing a Second Register in the Processor Core of a Digital Processor
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Magnetostrictive Surface Acoustic Wave Device and Microelectronic Circuit Including Same
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Article Comprising a Light-Actuated Micromechanical Photonic Switch
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Optical Subassembly for Use in Fiber Optic Data Transmission and Reception
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Thin Illuminator for Reflective Displays
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Semiconductor Laser Assembly with Reduced Ripple
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Epitaxial Facet Formation for Laser Diodes Based on Iii-V Material Systems
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Processor Powerdown Operation Using Intermittent Bursts of Instruction Clock
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Electronically Variable Power Control in Microstrip Line Fed Antenna Systems
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Reflective Array Multiplexer with Polarization Compensation
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Charge-Pump Phase-Locked Loop with Dc Current Source
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Phase-Locked Loop with Static Phase Offset Compensation
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Isotropic Negative Thermal Expansion Cermics and Process for Making
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Attenuator Element for a Buildout System
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High Power Wireless Telephone with Over-Voltage Protection Disabling Circuit
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Multilevel Data Communication System Including Local and Host Systems
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Wavelength Specific Operations in Optical Systems
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Electrical Isolation of Opto-Electronic Device Components
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Variable Clock Rate Analog-to-Digital Converter
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Variable Clock Rate, Variable Bit-Depth Analog-to-Digital Converter
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Optical Sub-Assembly Package Mount
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Error-Tolerant Target-Sector Search Using Previous N Sector Id for High-Speed Cd
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Message Box Memory Cell for Two-Side Asynchronous Access
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Micromachined Optical Switch with Tapered Ends
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Gain-Adjustable Voltage-Controlled Oscillator
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Magetically Tunable Laser with Wavelength Latchability and Optical Communication System Comprising Such Laser
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Autoreload Loop Counter
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Tunable Dispersion Compensator and Optical System Comprising Same
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Backgate Switched Power Amplifier
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Passively Temperature-Compensated Wavelength-Tunable Device Comprising Flexed Optical Gratings and Communication Systems Using Such Devices
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Wavelength-Tunable Devices and Systems Comprising Flexed Optical Gratings
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Modifiable Semiconductor Circuit Element
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Unequal Error Protection for Digital Broadcasting Using Channel Classification
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Radially-Increasing Core Power Bus Grid Architecture
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Mixed-Mode Adaptive Analog Receive Architecture for Data Communications
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Omnibus Closed Captioning Decoder for Encoded Video
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Integrated Circuit with Unified Memory System and Dual Bus Architecture
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Long Wavelength Ingaas Photogenerator
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System and Method for the Monolithic Integration of a Light Emitting Device and a Photodetector for Low Bias Voltage Operation
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Tracking Carrier Timing
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Undershoot Active Damping Circuit for Write Drivers
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Optical Drive Error Tracking Method and Apparatus
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Resistor Circuit with Dc Voltage Control
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Method and Apparatus for Calculating a Crc Remainder
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Method and Apparatus for Terminating a Bus Such That Stub Length Requirements Are Met
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Spool Support Assembly for the Optical Fiber of a Laser Module
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Optical Circulator Using Latchable Garnet
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Controllable Reactance Circuit for an Integrated Circuit
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Collet Arrangement for Integrated Circuit Structures
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Method of Direct Current Offset Cancellation
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Planar Waveguide Optical Amplifier
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Digitally Controlled Output Driver and Method for Impedance Matching
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Interrupt Mechanism on Northbay
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Ternary Content Addressable Memory (Cam) Having Fast Insertion and Deletion of Data Values
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Faraday Rotation Variable Attenuator
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Non-Destructive Method for Gauging Undercut in a Hidden Layer
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Enhanced Binary Content Addressable Memory for Longest Prefix Address Matching
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Digital Phase-Locked Loop with Pulse Controlled Charge Pump
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Digital Phase-Locked Loop with Pulse Controlled Charge Pump
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On-Demand Transfer Engine
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Analog to Digital Converter
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Capacitor Loaded Memory Cell
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Optical Modulator with Variable Prism
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Multichannel Laser Transmitter with a Single Output Port
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Laser Transmitter Based on a Coupler and Having a Controlled Output Port
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On-The-Fly Row-Syndrome Generation for Dvd Controller Ecc
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Optical Crossconnect System Comprising Reconfigurable Light-Reflecting Devices
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Optical Attenuator
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Cylindrical Lenses for Alignment of Optical Sources and Destinations
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Technique for Reducing Peak Current in Memory Operations
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A Rate 24/25 (0,9) Code Method and System for Prml Recording Channels
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Shared Datapath Processor and Method Utilizing Stack-Based and Register-Based Storage Spaces
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Single Cell Per Bit Shift Register
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Linear Cmos Transconductor with Rail-to-Rail Compliance
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Voltage-Controlled Oscillator
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Method and Apparatus for Estimating a Square of a Number
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Fractional Frequency Divider
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Digital Phase Selection Circuitry and Method for Reducing Jitter
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Phase Locked Loop (Pll) Circuit
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Method and Apparatus for Non-Contact Pulsating Jet Cleaving of a Semiconductor Material
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Testing Semiconductor Device for Data Retention
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Redundancy Analysis for Embedded Memories with Built-in Self Test and Built-in Self Repair
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Method and Apparatus for Automatic Sector Format Identification in an Optical Storage Device
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Method and Apparatus for Performing Efficient Reseeks in an Optical Storage Device
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Micromachined Tunable Optical Filter with Controllable Finesse and Passband Wavelength Position
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System, Apparatus, and Method for Automatic Node Isolating Scsi Terminator Switch
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Method of Improving the Performance of Optical Fiber Which Is Interconnected Between Two Misaligned Supports
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Foreground and Background Context Controller Setting Processor to Power Saving Mode When All Contexts Are Inactive
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System for Multitasking Management Employing Context Controller Having Event Vector Selection by Priority Encoding of Context Events
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Context Controller Having Status-Based Background Functional Task Resource Allocation Capability and Processor Employing the Same
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On-Chip Single Layer Horizontal Deflecting Waveguide and Damascene Method of Fabricating the Same
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Method to Allow Hardware Configurable Data Structures
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Optical Beamsplitter
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Focused Ion Beam Formation Os Angled Optoelectronic Devices
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Controllable Latch/Register Circuit
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Scriber Adapter Plate
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Projector Light Source Utlizing a Solid State Green Light Source
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Second Order Digital Filter Requiring Only One Sigma Delta Modulator
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Article Comprising a Deformable Segmented Mirror
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Photoreflectance Spectral Analysis of Semiconductor Laser Structures
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Net Strain Reduction in Integrated Laser-Modulator
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Low Disparity Coding Method for Digital Data
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Improved Training of Level Learning Modems
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Phase Delay Line for Collinear Array Antenna
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Dram Capacitor Including Cu Plug and Ta Barrier and Method of Forming
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Method for Sending Packets Between Trunk Ports of Network Switches
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Method of Improving Laser Yield for Target Wavelengths in Epitaxial Ingaasp Lasers Based Upon the Thermal Conductivity of the Inp Substrate
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Voltage Regulation for Integrated Circuit Memory
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Multifunction Reset for Mixed-Signal Integrated Circuits
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Saturable Bragg Reflectors for Use in Mode-Locking Lasers
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Reduced Impact Power Up/Down Mode in Electrical Circuits
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Optical Beam Power Controller Using a Tiltable Birefringent Plate
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Method and Device for Obtaining a Desired Phase of Optical Characteristic of a Fabry-Perot Etalon
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Low Noise Microphone Preamplifier
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Method and Apparatus for Aiming a Spray Etcher Nozzle
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Micropower, Minimal Area Dc Sensing Power-Up Reset Circuit
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Hardware Mechanism for Managing Cache Structures in a Data Storage System
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Thin-Film Monolithic Coupled Spiral Balun Transformer
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Phase Locked Loop Having Direct Digital Synthesizer Dividers and Improved Phase Detector
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Multi-Pair Transceiver Decoder System with Low Computation Slicer
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High-Speed Decoder for a Multi-Pair Gigabit Transceiver
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Method for Fabrication of Patterned Carbon Nanotube Films
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Optical Devices Having Improved Temperature Stability
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Low Voltage Bipolar Transconductor Circuit with Extended Dynamic Range
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Ultra Low Voltage Static Ram Memory Cell
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Viterbi Detector with Partial Erasure Compensation for Read Channels
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Echo Cancellation for Disk Drive Read Circuit
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Architecture to Reduce Errors Due to Metastability in Analog to Digital Converters
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A Method of Mapping a Surface Using a Prode for Stylus Nanoprofilometry Having a Non-Circular Cross-Section
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Multi-Frequency Rapidly Tunable Laser
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Magnitude and Group Delay Shaping Circuit in Continuous-Time Read Channel Filters
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Multiple Collimated-Beam Photonics Package
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Fibre Channel Learning Bridge, Learning Half Bridge, and Protocol
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Monolithic Multiple Wavelength Vcsel Array
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Adaptively Configurable Class-a/Class-B Transmit Dac for Transceiver Emission and Power Consumption Control
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Selective Growth Process for Group Iii-Nitride-Based Semiconductors
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Laser Aided Tilt Adjustment of an Optical Lens
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Circuit and Method for Reducing a Propagation Delay Associated with a Comparator and a Comparator Employing the Same
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Double Sampled Phase Detector Circuit
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Method and Structure for Uniform Height Solder Bumps on a Semiconductor Wafer
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Methods and Circuits for Restoration of a Drooped Dc Signal
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Current Mirrors
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Optical Transmitter for Wdm Systems
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Current Mirror for Preventing an Extreme Voltage and Lock-Up
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Laser Bar Transport Apparatus and Method
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Non-Volatile Mems Micro-Relays Using Magnetic Actuators
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Multi-Purpose Transistor Array
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Row Redundancy for Content Addressable Memory
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90 Degrees Phase Generator
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Sensing Architecture with Decreased Precharge Voltage Levels
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Integrated Gigabit Ethernet Transmitter Architecture
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Tuning Mechanical Resonators for Electrical Filter
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Determination of Transmitter Distortion
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Voltage-Mode Boosting Circuit for Write Driver
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Impedance Pseudo-Matched Write Driver
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Technique for Minimizing Decision Feedback Equalizer Wordlength in the Presence of a Dc Component
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Timing Recovery Using the Pilot Signal in High Definition Tv
Patent: 6,222,891 →
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Lock Detector for Phase Locked Loops
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Forming Attached Features on a Semiconductor Substrate
Patent: 6,265,757 →
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Graphics Display System with Unified Memory Architecture
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Efficient Fir Filter for High-Speed Communication
Patent: 6,272,173 →
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Dynamic Register with Low Clock Rate Testing Capability
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System and Method for on-Chip Filter Tuning
Patent: 6,285,865 →
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Balanced Differential Amplifier Having Common Mode Feedback with Kick-Start
Patent: 6,265,941 →
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Ternary Content Addressable Memory Cell
Patent: 6,154,384 →
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Adaptive Cancellation of Time Variant Dc Offset
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Surface Micro-Machined Acoustic Transducers
Patent: 6,249,075 →
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Predriver for High Frequency Data Transceiver
Patent: 6,265,914 →
Application: 09/444,424 →
Method of Manufacturing a Flash Memory Cell Having Improved Inter-Poly-Dielectric Isolation and Method of Manufacture
Patent: 6,284,598 →
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Integrated Circuit I/O Buffer with Series P-Channel and Floating Well
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Voltage Tolerant Oscillator Input Cell
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Quantized Queue Length Arbiter
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Sampling Device Having an Intrinsic Filter
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A Process for Fabricating an Optical Device
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Application: 09/451,433 →
Apparatus and Method for Charge Neutral Micro-Machine Control
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Intersecting N X M Star Couplers for Routing Optical Signals
Patent: 6,282,344 →
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Digital to Analog Converter with Reduced Ringing
Patent: 6,191,719 →
Application: 09/458,331 →
Integrated Oscillator Circuit with a Memory Based Frequency Control Circuit and Associated Methods
Patent: 6,271,733 →
Application: 09/460,159 →
Erasable Memory Device and an Associated Method for Erasing a Memory Cell Therein
Patent: 6,222,764 →
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Efficient Implementation of a Filter
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Method of Fabricating a Split Gate Memory Cell
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Split Gate Memory Cell
Patent: 6,313,500 →
Application: 09/460,812 →
Variable Attenuator Device for a Rectangular Waveguide
Patent: 6,240,237 →
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Method for Attractive Bonding of Two Crystalline Substrates
Patent: 6,187,653 →
Application: 09/465,884 →
Fast Comparator Suitable for Bist and Bisr Applications
Patent: 6,300,769 →
Application: 09/466,519 →
Image Rejection in Logic-Based Architecture for Fsk Modulation and Demodulation
Patent: 6,265,948 →
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Logic-Based Architecture for Fsk Modulation and Demodulation
Patent: 6,288,618 →
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Host Register Interface Testing on Bit Stream Based Systems
Patent: 6,300,770 →
Application: 09/467,193 →
Non-Uniform Delay Stages to Increase the Operating Frequency Range of Delay Lines
Patent: 6,265,924 →
Application: 09/468,711 →
Receive Deserializer for Regenerating Parallel Data Serially Transmitted Over Multiple Channels
Patent: 6,288,656 →
Application: 09/469,730 →
Apparatus and Method for Reducing Impairments from Nonlinear Fiber Effects in 1550 Nanometer External Modulation Links
Patent: 6,252,693 →
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Match Line Control Circuit for Content Addressable Memory
Patent: 6,147,891 →
Application: 09/471,103 →
Method and Device for Controlling Data Flow Through an Io Controller
Patent: 6,199,137 →
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Flattened Resistance Response For An Electrical Output Driver
Patent: 6,268,750 →
Application: 09/481,467 →
Built-In Self-Test Unit Having a Reconfigurable Data Retention Test
Patent: 6,255,836 →
Application: 09/481,891 →
Method and apparatus for converting between byte lengths and burdened burst lengths in a high speed cable modem
Patent: 6,236,678 →
Application: 09/483,559 →
Beam Homogenizer
Patent: 6,278,550 →
Application: 09/484,050 →
Charge pump with no diode drop at output stage
Patent: 6,191,963 →
Application: 09/488,069 →
Method and apparatus for low-power charge transition in an I/O sytem of an integrated circuit
Patent: 6,147,884 →
Application: 09/492,511 →
Phase splitter
Patent: 6,313,680 →
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Current stacked bandgap reference voltage source
Patent: 6,242,897 →
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Circuit and method for accurately mirroring currents in application specific integrated circuits
Patent: 6,172,495 →
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Temperature insensitive capacitor load memory cell
Patent: 6,272,039 →
Application: 09/498,543 →
Charge pump for low-voltage, low-jitter phase locked loops
Patent: 6,278,332 →
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Comparator metastability performance from an enhanced comparator detection circuit
Patent: 6,304,107 →
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Soldering optical subassemblies
Patent: 6,214,646 →
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Feed-forward compensation scheme for feedback circuits
Patent: 6,222,418 →
Application: 09/515,533 →
Control arrangement for optical mechanical switches
Patent: 6,301,402 →
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Method and mold for producing an electrooptical module, and electrooptical module
Patent: 6,309,566 →
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Slim rate/propagation delay selection circuit
Patent: 6,307,414 →
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Multi-port semiconductor memory and compiler having capacitance compensation
Patent: 6,233,197 →
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Circuit and method for control of amplifier operating angle
Patent: 6,275,108 →
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Battery charger with improved overcharge protection mechanism and method of operation thereof
Patent: 6,285,166 →
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Passive sample and hold in an active switched capacitor circuit
Patent: 6,313,668 →
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High slew-rate operational amplifier architecture
Patent: 6,310,520 →
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Self-timing circuit for semiconductor memory devices
Patent: 6,181,626 →
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Process for fabricating micromechanical devices
Patent: 6,300,156 →
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Phase-locked loop with built-in self-test of phase margin and loop gain
Patent: 6,262,634 →
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Process for fabricating an optical mirror array
Patent: 6,201,631 →
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Built-in redundancy architecture for computer memories
Patent: 6,222,783 →
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Reduced line select decoder for a memory array
Patent: 6,252,819 →
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Power supply loss detector method and apparatus
Patent: 6,310,497 →
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Baseland digital offset correction
Patent: 6,313,769 →
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Method of fabricating heterointerface devices having diffused junctions
Patent: 6,294,414 →
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Systems and methods for maintaining board signal integrity
Patent: 6,294,931 →
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Selective match line discharging in a partitioned content addressable memory array
Patent: 6,191,970 →
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Power-up circuit for analog circuits
Patent: 6,285,223 →
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Cam array with minimum cell size
Patent: 6,256,216 →
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Power-up circuit for analog circuit
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Analog to digital converter
Patent: 6,204,794 →
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Single-poly non-volatile memory cell having low-capacitance erase gate
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RF Connector with impedance matching tab
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Row redundancy in a content addressable memory
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Method & apparatus for 50% duty-cycle programmable divided-down clock with even and odd divisor rates
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Impedance-Matched, Voltage-Mode H-Bridge Write Drivers
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Method and structure for uniform height solder bumps on a semiconductor wafer
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External pull-up resistor detection and compensation of output buffer
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Variable impedance circuit
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CAM array with minimum cell size
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Laser fuse circuit design
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Merged NPN and PNP transistor stack for low noise and low supply voltage bandgap
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System for programmable chip initialization
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Digital to Analog Converter with Reduced Ringing
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Related Assignments (21)
Other recorded transfers of the patents in this record — the chain of ownership.
Change of Name Oct 14, 2008
From: ATI TECHNOLOGIES INC.
To: ATI TECHNOLOGIES ULC
Reel/Frame 021679/0230 →
Assignment of Assignor's Interest Jan 7, 2009
From: ADVANCED MICRO DEVICES, INC.; ATI TECHNOLOGIES ULC; ATI INTERNATIONAL SRL
To: BROADCOM CORPORATION
Reel/Frame 022083/0433 →
Patent Security Agreement May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
Patent Security Agreement Oct 28, 2014
From: PLX TECHNOLOGY, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 034069/0494 →
Merger Feb 20, 2015
From: AGERE SYSTEMS GUARDIAN CORP.
To: AGERE SYSTEMS INC.
Reel/Frame 035058/0884 →
Merger Feb 20, 2015
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
Reel/Frame 035058/0895 →
Assignment of Assignor's Interest Feb 20, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035059/0001 →
Assignment of Assignor's Interest Apr 3, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035365/0634 →
Change of Name Apr 16, 2015
From: NETLOGIC MICROSYSTEMS, INC.
To: NETLOGIC I LLC
Reel/Frame 035443/0824 →
Assignment of Assignor's Interest Apr 16, 2015
From: NETLOGIC I LLC
To: BROADCOM CORPORATION
Reel/Frame 035443/0763 →
Assignment of Assignor's Interest May 7, 2015
From: PLX TECHNOLOGY, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035615/0767 →
Termination and Release of Security Interest in Patent Rights (Releases Rf 034069-0494) Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: PLX TECHNOLOGY, INC.
Reel/Frame 037682/0802 →
Termination and Release of Security Interest in Patent Rights (Releases Rf 032856-0031) Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
Patent Security Agreement Feb 11, 2016
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Patent Security Agreement Feb 11, 2016
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To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
Termination and Release of Security Interest in Patents Feb 3, 2017
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To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
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Assignment of Assignor's Interest Sep 24, 2018
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Corrective Assignment to Correct the Effective Date of Merger Previously Recorded at Reel: 047185 Frame: 0643. Assignor(S) Hereby Confirms the Corrective Merger. Nov 5, 2018
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