Patent Assignment
Reel/Frame 038060/0911
Corrective Assignment to Correct the Assignor Document Date Should Be 12/20/2004 Previously Recorded on Reel 023736 Frame 0275. Assignor(S) Hereby Confirms the Assignment of Assignors Interest.
Recorded: 2016-03-10
Pages: 14
Assignor
NUMERICAL TECHNOLOGIES, INC.
Executed: 2004-12-20
Assignee
SYNOPSYS MERGER HOLDINGS, LLC.
700 E. MIDDLEFIELD ROAD, MOUNTAIN VIEW, CALIFORNIA, 94043
Covered Properties
(28)
Method and Apparatus for Reducing Incidental Exposure by Using a Phase Shifter with a Variable Regulator
Method and Apparatus for Using Phase Shifter Cutbacks to Resolve Phase Shifter Conflicts
Method and Apparatus for Reducing Color Conflicts During Trim Generation for Phase Shifters
Method and Apparatus for Analyzing a Layout Using an Instance-Based Representation
Modifying a Hierarchical Representation of a Circuit to Process Features Created by Interactions Between Cells
Modifying a Hierarchical Representation of a Circuit to Process Composite Gates
Method and apparatus for visualizing optical proximity correction process information and output
Application:
09/960,669 →
Publication:
US 2003/0061587
Method and Apparatus for Resolving Coloring Conflicts Between Phase Shifters
Method and Apparatus for Controlling Rippling During Optical Proximity Correction
Facilitating Minimum Spacing and/or Width Control During Optical Proximity Correction
Method and Apparatus to Facilitate Auto-Alignment of Images for Defect Inspection and Defect Analysis
Facilitating an Adjustable Level of Phase Shifting During an Optical Lithography Process for Manufacturing an Integrated Circuit
Patent:
6,605,481 →
Application:
10/094,487 →
Method and Apparatus for Identifying an Identical Cell in an Ic Layout with an Existing Solution
Using a Suggested Solution to Speed Up a Process for Simulating and Correcting an Integrated Circuit Layout
Method and apparatus to facilitate test pattern design for model calibration and proximity correction
Application:
10/116,286 →
Publication:
US 2003/0192015
Method and Apparatus for Facilitating Process-Compliant Layout Optimization
Method and Apparatus for Exposing a Wafer Using Multiple Masks During an Integrated Circuit Manufacturing Process
Facilitating Optical Proximity Effect Correction Through Pupil Filtering
Method and Apparatus for Reducing Optical Proximity Correction Output File Size
Considering Mask Writer Properties During the Optical Proximity Correction Process
Hybrid Optical Proximity Correction for Alternating Aperture Phase Shifting Designs
Using Second Exposure to Assist a Psm Exposure in Printing a Tight Space Adjacent to Large Feature
Selectively Applying Resolution Enhancement Techniques to Improve Performance and Manufacturing Cost of Integrated Circuits
Performing Optical Proximity Correction on Trim-Level Segments Not Abutting Features to Be Printed
Method and Apparatus for Using a Complementary Mask to Clear Phase Conflicts on a Phase Shifting Mask
Simulation-Based Selection of Evaluation Points for Model-Based Optical Proximity Correction
Method and Apparatus for Performing Target-Image-Based Optical Proximity Correction
Method and Apparatus for Controlling Rippling During Optical Proximity Correction
Related Assignments
(1)
Other recorded transfers of the patents in this record — the chain of ownership.