IP Library Assignment 062702/0001
Patent Assignment
Reel/Frame 062702/0001

Assignment of Assignor's Interest

Recorded: 2023-02-10 Pages: 47
Assignor
INTEL CORPORATION
Executed: 2021-12-29
Assignee
SK HYNIX NAND PRODUCT SOLUTIONS CORP.
3101 N. 1ST STREET, SAN JOSE, CALIFORNIA, 95134
Covered Properties (60)
Method and Device for Providing Hidden Storage in Non-Volatile Memory
Patent: 6,681,304 →
Application: 09/608,476 →
Memory Management
Patent: 9,317,421 →
Application: 14/039,129 →
Publication: US 2015/0095563
Error Correction in Non_Volatile Memory
Patent: 9,619,324 →
Application: 14/126,310 →
Publication: US 2015/0220387
Common Platform for One-Level Memory Architecture and Two-Level Memory Architecture
Patent: 9,600,413 →
Application: 14/140,261 →
Publication: US 2015/0178204
Error Correction in Memory
Patent: 9,411,683 →
Application: 14/141,215 →
Publication: US 2015/0188570
Hold-Up Energy Storage and Management
Patent: 9,740,258 →
Application: 14/223,439 →
Publication: US 2015/0268709
Protecting a Memory Device from Becoming Unusable
Patent: 9,606,853 →
Application: 14/229,345 →
Publication: US 2015/0278003
Extensible Memory Hub
Patent: 9,396,065 →
Application: 14/314,181 →
Publication: US 2015/0378814
Accelerating Boot Time Zeroing of Memory Based on Non-Volatile Memory (Nvm) Technology
Patent: 9,477,409 →
Application: 14/318,573 →
Publication: US 2015/0378615
Prevention of Cable-Swap Security Attack on Storage Devices
Patent: 9,870,462 →
Application: 14/492,168 →
Publication: US 2016/0085959
Recovery Algorithm in Non-Volatile Memory
Patent: 9,652,321 →
Application: 14/493,956 →
Publication: US 2016/0085621
Technologies for Accelerating Compute Intensive Operations Using Solid State Drives
Application: 14/498,030 →
Publication: US 2016/0094619
Secure Control of Self-Encrypting Storage Devices
Patent: 9,626,531 →
Application: 14/543,935 →
Publication: US 2016/0140364
Apparatus and Method for Increasing Resilience to Raw Bit Error Rate
Patent: 9,798,622 →
Application: 14/557,070 →
Publication: US 2016/0156372
Accelerated Data Recovery in a Storage System
Patent: 9,575,853 →
Application: 14/568,417 →
Publication: US 2016/0170846
Method, Apparatus and System for Configuring a Protocol Stack of an Integrated Circuit Chip
Patent: 9,734,116 →
Application: 14/658,021 →
Publication: US 2015/0269108
Caching and Tiering for Cloud Storage
Patent: 9,588,901 →
Application: 14/670,574 →
Publication: US 2016/0283394
Single Level Cell Write Buffering for Multiple Level Cell Non-Volatile Memory
Application: 14/671,493 →
Publication: US 2016/0284393
Efficient Data Compression for Solid-State Memory
Patent: 9,753,666 →
Application: 14/671,929 →
Publication: US 2016/0283159
Sequential Write Stream Management
Patent: 9,760,281 →
Application: 14/671,968 →
Publication: US 2016/0283116
Method and Apparatus for Improving Immunity to Defects in a Non-Volatile Memory
Patent: 9,830,093 →
Application: 14/672,080 →
Publication: US 2016/0283143
Accelerated Address Indirection Table Lookup for Wear-Leveled Non-Volatile Memory
Patent: 9,952,801 →
Application: 14/752,554 →
Publication: US 2016/0378396
High Performance Persistent Memory
Patent: 9,792,190 →
Application: 14/752,585 →
Publication: US 2016/0378623
System-In-Package Logic and Method to Control an External Packaged Memory Device
Patent: 9,972,610 →
Application: 14/809,132 →
Publication: US 2017/0025400
Secure Tunneling Access to Debug Test Ports on Non-Volatile Memory Storage Units
Patent: 9,766,963 →
Application: 14/862,488 →
Publication: US 2017/0083393
Methods and Apparatus to Configure Performance of a Solid State Drive Based on Host Write Bandwidth
Application: 14/866,192 →
Publication: US 2017/0090752
Techniques to Recover Data Using Exclusive or (Xor) Parity Information
Application: 14/866,291 →
Publication: US 2017/0091022
Data Recovery in Memory Devices
Application: 14/932,870 →
Publication: US 2017/0123946
Management of Power Loss in a Memory Device
Patent: 9,921,916 →
Application: 14/975,272 →
Publication: US 2017/0177374
Computing System Having Multi-Level System Memory Capable of Operating in a Single Level System Memory Mode
Application: 14/975,487 →
Publication: US 2017/0177482
Secure Resume from a Low Power State
Application: 14/975,569 →
Publication: US 2017/0177381
Compression of a Set of Integers
Application: 14/977,292 →
Publication: US 2017/0179977
Techniques to Power Down Output Power Rails for a Storage Device
Patent: 9,857,859 →
Application: 14/977,305 →
Publication: US 2017/0177057
Memory with Enhancement to Perform Radiation Measurement
Patent: 9,971,045 →
Application: 14/979,922 →
Publication: US 2017/0184733
Technologies for Reducing Latency in Read Operations
Patent: 9,842,022 →
Application: 15/001,358 →
Publication: US 2017/0206023
Supporting Multiple Memory Types in a Memory Slot
Application: 15/055,153 →
Publication: US 2017/0249991
Authenticating a System to Enable Access to a Diagnostic Interface in a Storage Device
Application: 15/086,040 →
Publication: US 2017/0288867
Method and Apparatus for an Error Tolerance Aware Data Retention Scheme in a Storage Device for Multi-Scale Error Tolerant Data
Patent: 9,916,199 →
Application: 15/086,050 →
Publication: US 2017/0286221
Wear Leveling Based on a Swapping Operation Between Sets of Physical Block Addresses of a Non-Volatile Memory
Patent: 9,971,685 →
Application: 15/089,133 →
Publication: US 2017/0286293
Method and Apparatus for Processing Sequential Writes to Portions of an Addressable Unit
Application: 15/089,333 →
Publication: US 2017/0286014
Extensible Memory Hub
Application: 15/175,697 →
Publication: US 2016/0364143
Method and Apparatus for Improving Performance of Sequential Logging in a Storage Device
Application: 15/176,650 →
Publication: US 2017/0357462
Method, System, and Apparatus for Nested Suspend and Resume in a Solid State Drive
Application: 15/197,617 →
Publication: US 2018/0004410
Linked-List Interlineation of Data
Application: 15/199,780 →
Publication: US 2018/0004598
Load Reduced Nonvolatile Memory Interface
Application: 15/201,370 →
Publication: US 2018/0004688
Power Control of a Memory Device Through a Sideband Channel of a Memory Bus
Application: 15/277,936 →
Publication: US 2018/0088658
Apparatus, System and Method for Throttling a Rate at Which Commands Are Accepted in a Storage Device
Application: 15/394,653 →
Publication: US 2018/0188952
Accelerated Data Recovery in a Storage System
Application: 15/398,651 →
Publication: US 2017/0212814
Common Platform for One-Level Memory Architecture and Two-Level Memory Architecture
Application: 15/427,880 →
Publication: US 2017/0147214
Caching and Tiering for Cloud Storage
Application: 15/450,698 →
Publication: US 2018/0024937
Method, Apparatus and System for Configuring a Protocol Stack of an Integrated Circuit Chip
Application: 15/671,900 →
Publication: US 2018/0210857
Secure Tunneling Access to Debug Test Ports on Non-Volatile Memory Storage Units
Application: 15/707,475 →
Publication: US 2018/0067794
High Performance Persistent Memory
Application: 15/728,414 →
Publication: US 2018/0032414
Techniques to Recover Data in a Network Storage System
Application: 15/778,616 →
Publication: US 2018/0293134
Data Storage System Connectors with Parallel Array of Dense Memory Cards and High Airflow
Application: 16/083,411 →
Publication: US 2019/0104632
Method, System, and Apparatus for Nested Suspend and Resume in a Solid State Drive
Application: 16/105,363 →
Publication: US 2019/0146669
Methods and Apparatus to Configure Performance of a Solid State Drive Based on Host Write Bandwidth
Application: 16/113,804 →
Publication: US 2019/0065057
Common Platform for One-Level Memory Architecture and Two-Level Memory Architecture
Application: 16/274,866 →
Publication: US 2019/0179531
Data Storage System Connectors with Parallel Array of Dense Memory Cards and High Airflow
Application: 16/932,635 →
Publication: US 2021/0007235
Data Storage System with Parallel Array of Dense Memory Cards and High Airflow
Application: 16/946,739 →
Publication: US 2020/0333859
Related Assignments (16)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 8, 2013
From: ROYER, ROBERT J., JR.
To: INTEL CORPORATION
Reel/Frame 031377/0891 →
Assignment of Assignor's Interest Apr 28, 2014
From: MORNING-SMITH, ANDREW; NGO, MIKE M.
To: INTEL CORPORATION
Reel/Frame 032764/0894 →
Assignment of Assignor's Interest May 5, 2014
From: KWOK, ZION S.; LEI, ANDRE; NELSON, SCOTT
To: INTEL CORPORATION
Reel/Frame 032820/0674 →
Assignment of Assignor's Interest May 15, 2014
From: SARANGDHAR, NITIN V.; OTTURU, SUDHAKAR
To: INTEL CORPORATION
Reel/Frame 032891/0331 →
Assignment of Assignor's Interest Jul 21, 2014
From: RAY, JOYDEEP; GEORGE, VARGHESE; SODHI, INDER M.; WILCOX, JEFFERY R.
To: INTEL CORPORATION
Reel/Frame 033348/0177 →
Assignment of Assignor's Interest Oct 1, 2014
From: WEBB, RANDALL K.; KHAN, JAWAD B.; COULSON, RICHARD L.; GRIMSRUD, KNUT S.
To: INTEL CORPORATION
Reel/Frame 033858/0165 →
Assignment of Assignor's Interest Dec 2, 2014
From: MOTWANI, RAVI H.
To: INTEL CORPORATION
Reel/Frame 034501/0658 →
Assignment of Assignor's Interest Mar 10, 2015
From: TRIKA, SANJEEV N.; COX, JASON R.; RAMALINGAM, ANAND S.
To: INTEL CORPORATION
Reel/Frame 035126/0687 →
Assignment of Assignor's Interest Mar 17, 2015
From: SPRY, BRYAN L.; SONG, MARCUS W.; RANGARAJ, DEEPAK M.; ANANTHAKRISHNAN, AVINASH N.
To: INTEL CORPORATION
Reel/Frame 035184/0383 →
Assignment of Assignor's Interest Apr 3, 2015
From: RAMANUJAN, RAJ K.; SANKARAN, RAJESH M.; NACHIMUTHU, MURUGASAMY K.; MANGOLD, RICHARD P.
To: INTEL CORPORATION
Reel/Frame 035330/0957 →
Assignment of Assignor's Interest Apr 15, 2015
From: KHAN, JAWAD B; GRIMSRUD, KNUT S; COULSON, RICHARD L
To: INTEL CORPORATION
Reel/Frame 035413/0810 →
Assignment of Assignor's Interest Apr 28, 2015
From: NATARAJAN, SHANKAR; COX, JASON R; FOSTER, CHARLES B; SHAH, HINESH K
To: INTEL CORPORATION
Reel/Frame 035510/0406 →
Assignment of Assignor's Interest Apr 29, 2015
From: MOTWANI, RAVI H; PANGAL, KIRAN
To: INTEL CORPORATION
Reel/Frame 035524/0745 →
Assignment of Assignor's Interest Aug 25, 2015
From: HANDS, JONMICHAEL P
To: INTEL CORPORATION
Reel/Frame 036416/0046 →
Assignment of Assignor's Interest Oct 30, 2015
From: KUMAR, MOHAN J.; NACHIMUTHU, MURUGASAMY K.; VERGIS, GEORGE
To: INTEL CORPORATION
Reel/Frame 036928/0346 →
Assignment of Assignor's Interest Feb 19, 2016
From: CHAHAL, SUDIP; BAHRA, HUSNI; WAYMAN, NIGEL; YOSHII, TERRY
To: INTEL CORPORATION
Reel/Frame 037776/0427 →