IP Library Assignment 065629/0328
Patent Assignment
Reel/Frame 065629/0328

Release of Security Interest

Recorded: 2023-11-20 Pages: 13
Assignor
Assignee
NETLIST, INC
111 ACADEMY WAY, SUITE 100, IRVINE, CALIFORNIA, 92617
Covered Properties (81)
Hybrid Memory System with Configurable Error Thresholds and Failure Analysis Capability
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Publication: US US20140281661A1
Non-Volatile Memory Storage for Multi-Channel Memory System
Patent: 9,436,600 →
Application: 14/302,292 →
Publication: US US20140365715A1
System and Method for Determining Charge of a Secondary Power Supply for a Memory System
Application: 62/102,996 →
Redundant Backup Using Non-Volatile Memory
Patent: 9,921,762 →
Application: 14/489,281 →
Publication: US US20150248249A1
Isolation Switching For Backup Memory
Patent: 9,269,437 →
Application: 14/489,332 →
Publication: US US20150255156A1
System And Method For Storing Manufacturing Information And Lifetime Usage History Of A Power Module For A Memory System
Application: 14/800,629 →
Publication: US US20160018866A1
Flash-Dram Hybrid Memory Module
Patent: 9,928,186 →
Application: 14/840,865 →
Publication: US US20160196223A1
Memory Module with Data Buffering
Patent: 9,858,215 →
Application: 14/715,486 →
Memory Module and Circuit Providing Load Isolation and Noise Reduction
Application: 14/715,491 →
Multi-Mode Memory Module with Data Handlers
Application: 14/229,844 →
Memory Module with Distributed Data Buffers and Method of Operation
Patent: 9,606,907 →
Application: 13/970,606 →
Publication: US US20140040568A1
Systems and Methods for Handshaking with a Memory Module
Patent: 9,311,116 →
Application: 13/942,721 →
Memory Package with Optimized Driver Load and Method of Operation
Patent: 9,318,160 →
Application: 14/337,168 →
Publication: US US20150070959A1
Arrangement of Memory Devices in a Multi-Rank Memory Module
Patent: 9,426,916 →
Application: 13/964,103 →
Memory Module with Local Synchronization
Application: 14/445,035 →
Publication: US US20160162404A1
Memory Module Having Volatile and Non-Volatile Memory Subsystems and Method of Operation
Application: 14/706,873 →
Publication: US US20160019138A1
Method and Apparatus for Presearching Stored Data
Application: 14/834,395 →
Publication: US US20160188252A1
Hybrid Memory Module and System and Method of Operating the Same
Application: 14/536,588 →
Publication: US US20150169238A1
Hybrid Mobile Memory for Random Access
Application: 62/067,411 →
Hybrid Memory Module for Computer System
Application: 62/150,272 →
Non-Volatile Memory Module
Patent: 8,301,833 →
Application: 12/240,916 →
Data Transfer Scheme for Non-Volatile Memory Module
Patent: 8,516,187 →
Application: 13/536,173 →
Publication: US US20120271990A1
Isolation Switching for Backup Memory
Patent: 8,671,243 →
Application: 13/905,048 →
Publication: US US20130254456A1
Flash-Dram Hybrid Memory Module
Patent: 8,874,831 →
Application: 13/559,476 →
Publication: US US20130086309A1
Redundant Backup Using Non-Volatile Memory
Patent: 8,904,098 →
Application: 13/625,563 →
Publication: US US20130019076A1
Isolation Switching for Backup of Registered Memory
Patent: 8,677,060 →
Application: 13/905,053 →
Publication: US US20130254497A1
Isolation Switching For Backup Memory
Patent: 8,904,099 →
Application: 14/173,219 →
Publication: US US20140156919A1
Isolation Switching For Backup Of Registered Memory
Patent: 8,880,791 →
Application: 14/173,242 →
Publication: US US20140156920A1
Flash-Dram Hybrid Memory Module
Patent: 9,158,684 →
Application: 14/489,269 →
Publication: US US20150242313A1
Arrangement of Integrated Ciruits in a Memory Module
Patent: 6,751,113 →
Application: 10/094,512 →
Publication: US US20030169614A1
Arrangement of Integrated Circuits in a Memory Module
Patent: 6,873,534 →
Application: 10/768,534 →
Publication: US US20040184301A1
Arrangement of Integrated Circuits in a Memory Module
Patent: 6,930,903 →
Application: 10/765,488 →
Publication: US US20040184300A1
Arrangement of Integrated Circuits in a Memory Module
Patent: 6,930,900 →
Application: 10/765,420 →
Publication: US US20040184299A1
High-Density Memory Module Utilizing Low-Density Memory Components
Patent: 7,286,436 →
Application: 11/075,395 →
Publication: US US20050281096A1
Memory Module Decoder
Patent: 7,289,386 →
Application: 11/173,175 →
Publication: US US20060062047A1
Memory Module Decoder
Patent: 7,619,912 →
Application: 11/862,931 →
Publication: US US20080068900A1
Memory Module Decoder
Patent: 7,864,627 →
Application: 12/577,682 →
Publication: US US20100091540A1
Circuit for Providing Chip-Select Signals to a Plurality of Ranks of a Ddr Memory Module
Patent: 8,081,535 →
Application: 12/954,492 →
Publication: US US20110090749A1
Memory Module with a Circuit Providing Load Isolation and Memory Domain Translation
Patent: 7,532,537 →
Application: 11/335,875 →
Publication: US US20060262586A1
Memory Module with a Circuit Providing Load Isolation and Memory Domain Translation
Patent: 7,636,274 →
Application: 12/408,652 →
Publication: US US20090201711A1
Circuit Providing Load Isolation and Memory Domain Translation for Memory Module
Patent: 7,881,150 →
Application: 12/629,827 →
Publication: US US20100128507A1
Circuit Providing Load Isolation and Memory Domain Translation for Memory Module
Patent: 7,916,574 →
Application: 12/955,711 →
Publication: US US20110085406A1
Circuit Providing Load Isolation and Memory Domain Translation for Memory Module
Patent: 8,072,837 →
Application: 12/981,380 →
Circuit for Providing Chip-Select Signals to a Plurality of Ranks of a Ddr Memory Module
Patent: 8,081,537 →
Application: 13/154,172 →
Multirank Ddr Memory Modual with Load Reduction
Patent: 8,756,364 →
Application: 13/287,042 →
Circuit for Memory Module
Patent: 8,081,536 →
Application: 13/032,470 →
Circuit for Memory Module
Patent: 8,516,188 →
Application: 13/287,081 →
Memory Module with Load Reducing Circuit and Method of Operation
Patent: 9,037,774 →
Application: 13/971,231 →
Publication: US US20140040569A1
High Density Memory Module Using Stacked Printed Circuit Boards
Patent: 7,254,036 →
Application: 11/101,155 →
Publication: US US20060044749A1
High Density Memory Module Using Stacked Printed Circuit Boards
Patent: 7,375,970 →
Application: 11/775,125 →
Publication: US US20080007921A1
High Density Module Having at Least Two Substrates and at Least One Thermally Conductive Layer Therebetween
Patent: 7,630,202 →
Application: 12/052,678 →
Publication: US US20080316712A1
Module Having at Least Two Surfaces and at Least One Thermally Conductive Layer Therebetween
Patent: 8,345,427 →
Application: 12/939,915 →
Publication: US US20110110047A1
Module Having at Least One Thermally Conductive Layer Between Printed Circuit Boards
Patent: 8,971,045 →
Application: 13/731,014 →
Module Having at Least Two Surfaces and at Least One Thermally Conductive Layer Therebetween
Patent: 7,839,645 →
Application: 12/606,136 →
Publication: US US20100110642A1
Circuit Card with Flexible Connection for Memory Module with Heat Spreader
Patent: 7,442,050 →
Application: 11/511,523 →
Circuit with Flexible Portion
Patent: 7,811,097 →
Application: 12/237,162 →
Circuit with Flexible Portion
Patent: 8,033,836 →
Application: 12/874,900 →
Circuit with Flexible Portion
Patent: 8,287,291 →
Application: 13/231,870 →
Electronic Module with Flexible Portion
Patent: 8,864,500 →
Application: 13/653,254 →
Heat Spreader for Electronic Modules
Patent: 7,619,893 →
Application: 11/707,625 →
Heat Spreader for Memory Modules
Patent: 7,839,643 →
Application: 12/617,665 →
Memory Module Having Thermal Conduits
Patent: 8,488,325 →
Application: 12/916,945 →
Circuit Providing Load Isolation and Noise Reduction
Patent: 8,154,901 →
Application: 12/422,853 →
Circuit Providing Load Isolation and Noise Reduction
Patent: 8,782,350 →
Application: 13/412,243 →
Publication: US US20120250386A1
Memory Module With Circuit Providing Load Isolation and Noise Reduction
Patent: 9,037,809 →
Application: 14/324,990 →
Memory Board with Self-Testing Capability
Patent: 8,001,434 →
Application: 12/422,925 →
Memory Board with Self-Testing Capability
Patent: 8,359,501 →
Application: 13/183,253 →
Apparatus and Method for Self-Test in a Multi-Rank Memory Module
Patent: 8,689,064 →
Application: 13/745,790 →
System and Method of Increasing Addressable Memory Space on a Memory Board
Patent: 8,417,870 →
Application: 12/504,131 →
Publication: US US20110016269A1
System and Method Utilizing Distributed Byte-Wise Buffers on a Memory Module
Patent: 8,516,185 →
Application: 12/761,179 →
Publication: US US20110016250A1
Heat Dissipation for Electronic Modules
Patent: 8,018,723 →
Application: 12/432,591 →
Heat Dissipation for Electronic Modules
Patent: 8,705,239 →
Application: 13/205,477 →
Systems and Methods for Refreshing a Memory Module
Patent: 8,264,903 →
Application: 12/774,632 →
Circuit and Method for Refreshing a Memory Module
Patent: 8,599,634 →
Application: 13/584,679 →
Systems and Methods for Handshaking with a Memory Module
Patent: 8,489,837 →
Application: 12/815,339 →
Method and Apparatus for Optimizing Driver Load in a Memory Package
Patent: 8,787,060 →
Application: 13/288,850 →
Publication: US US20120106228A1
Memory Module with Distributed Data Buffers and Method of Operation
Patent: 9,128,632 →
Application: 13/952,599 →
Publication: US US20140337539A1
Flash-Dram Hybrid Memory Module
Memory System with Configurable Error Thresholds and Failure Analysis Capability
Memory Module with Local Synchronization
Hybrid Memory Module and System and Method of Operating the Same
Related Assignments (13)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 6, 2012
From: CHEN, CHI-SHE; SOLOMON, JEFFREY C.; MILTON, SCOTT; BHAKTA, JAYESH
To: NETLIST, INC.
Reel/Frame 028504/0323 →
Assignment of Assignor's Interest Oct 22, 2013
From: BHAKTA, JAYESH R.; NGUYEN, SON H
To: NETLIST, INC.
Reel/Frame 031456/0629 →
Assignment of Assignor's Interest Sep 18, 2014
From: LEE, HYUN
To: NETLIST, INC.
Reel/Frame 033770/0722 →
Assignment of Assignor's Interest Jan 6, 2015
From: MILTON, SCOTT H.; SOLOMON, JEFFREY C.; POST, KENNETH S.
To: NETLIST, INC.
Reel/Frame 034642/0407 →
Assignment of Assignor's Interest Apr 18, 2015
From: LEE, HYUN; BHAKTA, JAYESH R; CHEN, CHI SHE; SOLOMON, JEFFERY C.
To: NETLIST, INC.
Reel/Frame 035442/0749 →
Assignment of Assignor's Interest Aug 21, 2015
From: MILTON, SCOTT H.
To: NETLIST, INC.
Reel/Frame 036393/0086 →
Assignment of Assignor's Interest Aug 25, 2015
From: CHEN, CHI-SHE; SOLOMON, JEFFREY C.; MILTON, SCOTT M.; BHAKTA, JAYESH
To: NETLIST, INC.
Reel/Frame 036407/0971 →
Security Interest Nov 20, 2015
From: NETLIST, INC.
To: SVIC NO. 28 NEW TECHNOLOGY BUSINESS INVESTMENT L.L.P.
Reel/Frame 037150/0897 →
Assignment of Assignor's Interest Apr 17, 2016
From: LEE, HYUN
To: NETLIST, INC.
Reel/Frame 038300/0110 →
Assignment of Assignor's Interest Apr 17, 2016
From: LEE, HYUN; BHAKTA, JAYESH R.
To: NETLIST, INC.
Reel/Frame 038300/0101 →
Assignment of Assignor's Interest Apr 17, 2016
From: LEE, HYUN
To: NETLIST, INC.
Reel/Frame 038300/0107 →
Assignment of Assignor's Interest Nov 10, 2017
From: SOLOMON, JEFFREY C.; BHAKTA, JAYESH R.
To: NETLIST, INC.
Reel/Frame 044088/0994 →
Assignment of Assignor's Interest Aug 23, 2023
From: LEE, HYUN
To: NETLIST, INC
Reel/Frame 064686/0749 →