IP Library Granted Patent US 8,241,964
Granted Patent B2
US 8,241,964 · App. 12/779,781 · Granted Aug 14, 2012

Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation

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Quick Facts
Patent No.
US 8,241,964
App. No.
12/779,781
Granted
Aug 14, 2012
Kind
B2
Abstract

A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the first semiconductor die. A penetrable adhesive layer is formed over a temporary carrier. The adhesive layer can include a plurality of slots. The semiconductor die is mounted to the carrier by embedding the bumps into the penetrable adhesive layer. The semiconductor die and interconnect structure can be separated by a gap. An encapsulant is deposited over the first semiconductor die. The bumps embedded into the penetrable adhesive layer reduce shifting of the first semiconductor die while depositing the encapsulant. The carrier is removed. An interconnect structure is formed over the semiconductor die. The interconnect structure is electrically connected to the bumps. A thermally conductive bump is formed over the semiconductor die, and a heat sink is mounted to the interconnect structure and thermally connected to the thermally conductive bump.

Claims (56)

1. A method of making a semiconductor device, comprising:

providing a temporary carrier;

forming a penetrable adhesive layer over the temporary carrier;

providing a first semiconductor die having a plurality of bumps formed over a surface of the first semiconductor die;

mounting the first semiconductor die to the temporary carrier by embedding the bumps into the penetrable adhesive layer;

depositing an encapsulant over the first semiconductor die, wherein the bumps embedded into the penetrable adhesive layer reduce shifting of the first semiconductor die while depositing the encapsulant;

removing the temporary carrier and penetrable adhesive layer; and

forming an interconnect structure over the first semiconductor die, the interconnect structure being electrically connected to the bumps.

2. The method of claim 1 , further including embedding the bumps in the interconnect structure.

3. The method of claim 1 , further including providing a gap between the surface of the first semiconductor die and interconnect structure.

4. The method of claim 1 , further including forming a dummy bump over the surface of the first semiconductor die, the dummy bump being embedded into the interconnect structure.

5. The method of claim 1 , further including:

forming a thermally conductive bump over the surface of the first semiconductor die; and

mounting a heat sink to the interconnect structure, the heat sink being thermally connected to the thermally conductive bump.

6. The method of claim 1 , further including mounting a second semiconductor die or component to a surface of the interconnect structure opposite the first semiconductor die.

7. A method of making a semiconductor device, comprising:

providing a carrier;

forming an adhesive layer over the carrier;

providing a first semiconductor die having a plurality of bumps formed over a surface of the first semiconductor die;

mounting the first semiconductor die to the carrier by embedding the bumps into the adhesive layer;

depositing an encapsulant over the first semiconductor die;

removing the carrier; and

forming an interconnect structure over the first semiconductor die.

8. The method of claim 7 , wherein the bumps embedded into the adhesive layer reduce shifting of the first semiconductor die while depositing the encapsulant.

9. The method of claim 7 , further including forming a plurality of slots in the adhesive layer.

10. The method of claim 7 , further including providing a gap between the surface of the first semiconductor die and interconnect structure.

11. The method of claim 7 , further including retaining the adhesive layer after removing the carrier.

12. The method of claim 7 , further including forming a redistribution layer over the encapsulant.

13. The method of claim 7 , further including mounting a second semiconductor die or component to a surface of the interconnect structure opposite the first semiconductor die.

14. The method of claim 7 , wherein a first one of the bumps has a larger cross-sectional area than a second one of the bumps.

15. A method of making a semiconductor device, comprising:

providing a first semiconductor die having a plurality of bumps formed over a surface of the first semiconductor die;

embedding the bumps of the first semiconductor die into an adhesive layer;

depositing an encapsulant over the first semiconductor die;

exposing a portion of the bumps from the adhesive layer after depositing the encapsulant; and

forming an interconnect structure over the first semiconductor die and contacting the exposed portion of the bumps.

16. The method of claim 15 , further including:

providing a carrier;

forming the adhesive layer over the carrier; and

removing the carrier after depositing the encapsulant.

17. The method of claim 15 , further including forming a plurality of slots in the adhesive layer.

18. The method of claim 15 , further including:

forming a thermally conductive bump over the surface of the first semiconductor die; and

mounting a heat sink to the interconnect structure, the heat sink being thermally connected to the thermally conductive bump.

19. The method of claim 15 , further including a second semiconductor die or component mounted to a surface of the interconnect structure opposite the first semiconductor die.

20. The method of claim 15 , further including forming a redistribution layer over the encapsulant.

21. A method of making a semiconductor device, comprising:

providing a first semiconductor die having a plurality of bumps formed over a surface of the first semiconductor die;

embedding the bumps of the first semiconductor die into an adhesive layer;

depositing an encapsulant over the first semiconductor die;

exposing a portion of the bumps; and

forming an interconnect structure over the first semiconductor die and contacting the exposed portion of the bumps.

22. The method of claim 21 , further including embedding the bumps in the interconnect structure.

23. The method of claim 21 , further including forming a plurality of slots in the adhesive layer.

24. The method of claim 21 , further including forming a dummy bump over the surface of the first semiconductor die, the dummy bump being embedded into the interconnect structure.

25. The method of claim 21 , wherein the bumps embedded into the adhesive layer reduce shifting of the first semiconductor die while depositing the encapsulant.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038388 FRAME: 0036. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064834/0911 →
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE ASSIGNMENT. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064836/0363 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38388 FRAME: 0036 Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0885 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 8, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038388/0036 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2010
From: PAGAILA, REZA A.; LIN, YAOJIAN; KOO, JUN MO
To: STATS CHIPPAC, LTD.
Reel/Frame 024383/0545 →