IP Library Granted Patent US 9,246,615
Granted Patent B2
US 9,246,615 · App. 14/040,320 · Granted Jan 26, 2016

Delay measurement in a point to multipoint system

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Quick Facts
Patent No.
US 9,246,615
App. No.
14/040,320
Granted
Jan 26, 2016
Kind
B2
Abstract

A system and method for measuring a propagation delay in a point to multipoint network. The system includes a central timing module which provides a timing signal to a plurality of line cards. Each of the line cards includes a local clock that is frequency locked to a 1588 clock and is configured to generate a return timing signal to the central timing module after a predetermined number of clock cycles. The central timing module measures the propagation delay based on the clock cycles of the local clock counted before the return signal is generated and the period of the local clock.

Claims (39)

1. A method for measuring a propagation delay in a multi-point communication system, comprising:

generating a timing signal from a central timing module;

transmitting the timing signal to at least one line card, each of the at least one line card including a local time counter (LTC), the LTC configured to be responsive to a local clock of the respective line card;

responsive to the received transmitted timing signal, the LTC of the respective line card initiating a count of a respective predetermined number of clock cycles of the respective local clock, and upon reaching the respective predetermined number of clock cycles of the respective local clock, the respective line card transmitting a timing response to the central timing module, the timing response including timing delay information for the respective line card; and

measuring the propagation delay at the central timing module for the respective line card responsive to the transmitted timing response of the respective line card.

2. The method of claim 1 , wherein the timing signal is a pulse signal transmitted at a rate of 1 pulse per second (1 PPS).

3. The method of claim 1 , wherein the at least one line card includes at least one application specific integrated circuit (ASIC).

4. The method of claim 1 , wherein the local clock of each line card is operated at a frequency which is locked to an IEEE 1588 compliant clock source.

5. The method of claim 1 , wherein the timing delay information for the respective line card includes the respective predetermined number of clock cycles and a period of the respective local clock.

6. The method of claim 1 , wherein the propagation delay for the respective line card is measured according to (t2−t1−N*T)/2, where t2 is an arrival time of the timing response from the respective line card, t1 is the time of transmitting the timing signal to the at least one line card, N is the respective predetermined number of clock cycles of the respective line card, and T is a period of the respective local clock.

7. A method for measuring a propagation delay in a multi-point communication system, comprising:

generating a timing signal from a central timing module;

distributing the timing signal to a plurality of receiving devices, each of the receiving devices being configured with a local time counter responsive to a local clock of the respective receiving device;

responsive to the received timing signal, the local time counter of the respective receiving device initiating a count of a respective predetermined number of clock cycles of the respective local clock, and upon reaching the respective predetermined number of clock cycles of the respective local clock, the respective receiving device transmitting a reply message to the central timing module, the reply message including timing delay information for the respective receiving device, the reply messages being generated by each of the receiving devices according to a respective slot time for the respective receiving device, said respective slot time set responsive to the respective predetermined number of clock cycles;

measuring the propagation delay between the central timing module and each of the respective receiving devices at the central timing module responsive to the received reply message from the respective receiving devices.

8. The method of claim 7 , wherein the timing signal is a 1 pulse per second signal.

9. The method of claim 7 , wherein the timing delay information for the respective receiving device includes the respective predetermined number of clock cycles and a period of the respective local clock.

10. A system for measuring propagation delay in a communication network, the system comprising:

a timing module configured to distribute a timing signal; and

at least one line card in communication with said timing module and arranged to receive said distributed timing signal, each of the at least one line card including a local time counter (LTC), the LTC responsive to a local clock of the respective line card,

each said line card arranged, responsive to the received distributed timing signal to:

count a respective predetermined number of clock cycles of the respective local clock; and

upon reaching the respective predetermined number of clock cycles of the respective local clock, transmit a timing response to the timing module, the timing response including timing delay information for the respective line card,

the timing module arranged to calculate the propagation delay for each respective line card responsive to the timing response of the respective line card.

11. The system of claim 10 , wherein the propagation delay for each respective line card is further determined based on a transmission time of the distributed timing signal and an arrival time of the respective timing response at the timing module.

12. The system of claim 10 , wherein the local clock of each line card is operated at a frequency locked to an IEEE 1588 compliant clock.

13. The system of claim 10 , wherein the respective predetermined number of clock cycles is set according to a predefined slot time.

14. The system of claim 10 wherein said at least one line card comprises a plurality of line cards, a first line card providing timing information to at least one other line card to enable synchronization between the first line card and the at least one other line card.

15. A method for conducting timing related processing in a multi-point communication system, comprising:

generating a timing signal from a central timing module;

transmitting the timing signal to at least one line card, each of the at least one line card including a local time counter (LTC) and a local clock, the LTC responsive to the local clock;

responsive to the received transmitted timing signal, the LTC of the respective line card initiating a count of a respective predetermined number of clock cycles of the respective local clock, and upon reaching the respective predetermined number of clock cycles of the respective local clock, the respective line card transmitting a timing response to the central timing module, the timing response including timing delay information for the respective line card;

determining the propagation delay at the central timing module for the respective line card responsive to the timing response of the respective line card; and

providing the respective determined propagation delay to the respective line card for synchronization of the respective line card with the central timing module.

16. The method of claim 15 , wherein the at least one line card includes at least one application specific integrated circuit (ASIC).

17. The method of claim 16 , wherein the at least one ASIC is further synchronized with the central timing module.

18. The method of claim 15 , wherein the local clock of each line card is operated at a frequency which is locked to an IEEE 1588 compliant clock source.

19. The method of claim 15 , wherein the timing delay information for the respective line card includes the respective predetermined number of clock cycles and a period of the respective local clock.

20. The method of claim 15 , wherein the propagation delay for the respective line card is measured according to (t2−t1−N*T)/2, where t2 is an arrival time of the timing response from the respective line card, t1 is the time of transmitting the timing signal to the at least one line card, N is the respective predetermined number of clock cycles of the respective line card, and T is a period of the respective local clock.

Assignments (19)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2017
From: MICROSEMI COMMUNICATIONS, INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 042523/0577 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
MERGER AND CHANGE OF NAME Recorded May 13, 2015
From: VITESSE SEMICONDUCTOR CORPORATION; LLIU100 ACQUISITION CORP.
To: MICROSEMI COMMUNICATIONS, INC.
Reel/Frame 035623/0632 →
SUPPLEMENTAL SECURITY AGREEMENT Recorded Apr 29, 2015
From: MICROSEMI COMMUNICATIONS, INC.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 035532/0925 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2015
From: ELLEGARD, LARS; JOERGENSEN, THOMAS KIRKEGAARD
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 035181/0154 →