System comprising a semiconductor device and structure
A semiconductor device, including: a first layer including first transistors, the first transistors are interconnected by at least one metal layer including copper or aluminum; a second layer including second transistors, the first layer is overlaid by the second layer, where the second layer includes a plurality of through layer vias having a diameter of less than 200 nm, where the second transistors include a source contact, the source contact including a silicide, and where the silicide has a sheet resistance of less than 15 ohm/sq.
1. A semiconductor device, comprising:
a first layer comprising first transistors, said first transistors are interconnected by at least one metal layer comprising copper or aluminum;
a second layer comprising second transistors, said first layer is overlaid by said second layer,
wherein said second layer comprises a plurality of through layer vias having a diameter of less than 200 nm,
wherein said second transistors comprise a source contact, said source contact comprising a silicide, and
wherein said silicide has a sheet resistance of less than 15 ohm/sq.
2. A semiconductor device according to claim 1 ,
wherein at least two of said second transistors comprise connected gates.
3. A semiconductor device according to claim 1 ,
wherein at least two of said second transistors comprise a common source or a common drain.
4. A semiconductor device according to claim 1 ,
wherein said second transistors are lithographically aligned to said first transistors.
5. A semiconductor device according to claim 1 ,
wherein said first transistors are down-looking transistors and said second transistors are up-looking transistors.
6. A semiconductor device according to claim 1 ,
wherein said second transistors comprise a high k metal gate.
7. A semiconductor device according to claim 1 , further comprising:
a re-useable donor wafer as a source of said second layer.
8. A semiconductor device according to claim 1 , further comprising:
an isolation layer disposed between said first layer and said second layer.
9. A semiconductor device, comprising:
a first layer comprising first transistors, said first transistors are interconnected by at least one metal layer comprising copper or aluminum;
a second layer comprising second transistors, said first layer is overlaid by said second layer,
wherein said second layer comprises a plurality of through layer vias having a diameter of less than 200 nm, and
wherein at least two of said second transistors comprise connected gates.
10. A semiconductor device according to claim 9 ,
wherein said second transistors comprise a source contact, said source contact comprises a silicide.
11. A semiconductor device according to claim 9 ,
wherein at least two of said second transistors comprise a common source or a common drain.
12. A semiconductor device according to claim 9 ,
wherein said second transistors are lithographically aligned to said first transistors.
13. A semiconductor device according to claim 9 ,
wherein said first transistors are down-looking transistors and said second transistors are up-looking transistors.
14. A semiconductor device according to claim 9 ,
wherein said second transistors comprise a high k metal gate.
15. A semiconductor device according to claim 9 , further comprising:
a re-useable donor wafer as a source of said second layer.
16. A semiconductor device according to claim 9 , further comprising:
an isolation layer disposed between said first layer and said second layer.
17. A semiconductor device, comprising:
a first layer comprising first transistors, said first transistors are interconnected by at least one metal layer comprising copper or aluminum;
a second layer comprising second transistors, said first layer is overlaid by said second layer,
wherein said second layer comprises a plurality of through layer vias having a diameter of less than 200 nm, and
wherein at least two of said second transistors comprise a common source or a common drain.
18. A semiconductor device according to claim 17 ,
wherein said second transistors comprise a source contact, said source contact comprises a silicide.
19. A semiconductor device according to claim 17 ,
wherein at least two of said second transistors comprise connected gates.
20. A semiconductor device according to claim 17 ,
wherein said second transistors are lithographically aligned to said first transistors.
21. A semiconductor device according to claim 17 ,
wherein said first transistors are down-looking transistors and said second transistors are up-looking transistors.
22. A semiconductor device according to claim 17 , further comprising:
a re-useable donor wafer as a source of said second layer.
23. A semiconductor device according to claim 17 , further comprising:
an isolation layer disposed between said first layer and said second layer.