Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
A semiconductor device includes a porous dielectric layer including a recessed portion, a conductive layer formed in the recessed portion, and a cap layer formed on the porous dielectric layer and on the conductive layer in the recessed portion, an upper surface of the porous dielectric layer being exposed through a gap in the cap layer.
1. A method of forming a semiconductor device, the method comprising:
forming a pore-filled porous dielectric layer having a non-planar surface;
forming a conformal cap layer on exposed portions of the non-planar surface of the pore-filled porous dielectric layer; and
removing a portion of the conformal cap layer disposed on a top surface of the pore-filled porous dielectric layer to expose the top surface of the pore-filled porous dielectric layer.
2. The method of claim 1 , wherein: prior to forming the conformal cap layer, forming a conductive layer in a recessed portion of the pore-filled porous dielectric layer, wherein the conformal cap layer is also disposed on an upper surface of the conductive layer.
3. The method of claim 1 , further comprising: using a thermal treatment to remove pore-filling material from the pore-filled porous dielectric layer.
4. The method of claim 2 , further comprising: using a thermal treatment to remove pore-filling material from the pore-filled porous dielectric layer.
5. The method of claim 1 , further comprising: using an ultraviolet, UV, light treatment to remove pore-filling material from the pore-filled porous dielectric layer.
6. The method of claim 2 , further comprising: using an ultraviolet, UV, light treatment to remove pore-filling material from the pore-filled porous dielectric layer.
7. The method of claim 1 , further comprising: prior to removing the portion of the conformal cap layer, depositing an interlayer dielectric on the conformal cap layer.
8. The method of claim 2 , further comprising: prior to removing the portion of the conformal cap layer, depositing an interlayer dielectric on the conformal cap layer.
9. The method of claim 1 , further comprising: using chemical-mechanical polishing, CMP, to remove the portion of the conformal cap layer.
10. The method of claim 2 , further comprising: using chemical-mechanical polishing, CMP, to remove the portion of the conformal cap layer.
11. The method of claim 7 , further comprising: using chemical-mechanical polishing, CMP, to remove the portion of the conformal cap layer.
12. The method of claim 8 , further comprising: using chemical-mechanical polishing, CMP, to remove the portion of the conformal cap layer.
13. The method of claim 1 , wherein the conformal cap layer comprises silicon carbide.
14. The method of claim 1 , wherein the conformal cap layer comprises silicon nitride.
15. The method of claim 1 , wherein the conformal cap layer comprises silicon carbonitride.
16. The method of claim 1 , wherein the conformal cap layer has a thickness of approximately 5 nm.
17. The method of claim 1 , wherein the conformal cap layer has a thickness of approximately 20 nm.
18. The method of claim 2 , further comprising: recessing the conductive layer prior to forming the conformal cap layer to form a recessed conductive layer.
19. The method of claim 18 , wherein recessing the conductive layer increases a lateral distance measured between opposite sidewalls of the pore-filled porous dielectric layer measured at a location above a top surface of the recessed conductive layer.
20. The method of claim 19 , further comprising: forming a fully-aligned via in a region where the conductive layer has been recessed.